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HP Vectra 500 Series PC Hardware and BIOS Technical Reference Manual Models: 520 5/xx 525 5/xx September 1996.
Notice The information contained in this document is subject to change without notice. Hewlett-Packard makes no warranty of any kind with regard to this material, including, but not limited to, the implied warranties of merchantability and fitness for a particular purpose.
3 Preface This manual is a technical reference and BIOS document for engineers and technicians providing system level support for HP Vectra 500 Series PCs for models 520 5/xx and 525 5/xx. It is assumed that the reader possesses a detailed understanding of AT- compatible microprocessor functions and digital addressing techniques.
4 Conventions The following conventions are used throughout this manual to identify specific elements: ❒ Hexadecimal numbers are identified by a lower case h. For example, 0FFFFFFFh or 32F5h ❒ Binary numbers and bit patterns are identified by a lower case b.
Contents English 5 1 HP V ectra 500 Series Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 System Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 D4051-63001 Models .
6 English 2 System Board - (SiS Chipset) (Part Number: D4051-63001) Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
English 7 Devices on the Processor Local Bus (D4051-63001) . . . . . . . . . . . . . 44 Main Memory (UMA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Cache Memory (D4051-63 001) . . . . . . . . . . . . . . . . .
8 English 3 System Board (P/Ns D3657-63001 and D3661-63001) Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 D3657-63 001 Models . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
English 9 Superscalar Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 Floating Point Unit (FPU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 Dynamic Branch Prediction . . . . .
10 English 4 Summary of the HP/Phoenix BIOS Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 HP/Phoenix BIOS Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 Updating the Sy stem ROM .
English 11 Security Menu (BIOS version: GJ.07.xx) . . . . . . . . . . . . . . . . . . . . . . . . 102 Power Menu (BIOS version: GJ.07.xx) . . . . . . . . . . . . . . . . . . . . . . . . . . 102 Summary Configuration Screen (BIOS version: GJ.07.xx) . .
12 English Matrox MGA Millennium V ideo Controller Card . . . . . . . . . . . . . . 127 MGA Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 MGA Video Memory . . . . . . . . . . . . . . . . . . . . .
13 1 HP Vectra 500 Series This chapter provides a description of the HP V ectra 500 Series desktop (Models 520 5/xx) and minitower (Models 525 5/xx) computers with detailed sy stem specifications.
14 1 HP Vectra 5 00 Series Introduction Introduction Three group types have been defined to help identify the various sy stem configurations available on the HP 500 Series desktop and minitower packages. W ithin each group, a product number and the appropriate HP V ectra 500 Series model have been associated with the HP Service Part Number .
15 1 HP Vectra 50 0 Series System Overview System Overview D4051-63001 Models The HP Service Part Number D4051-63001 group contains HP V ectra 500 Series models that have the following features: Unified Memory Architecture (UMA), main memory upgradable to 192 MB, and the SiS (Silicon Integrated Sy stem) 6205 video graphic controller .
16 1 HP Vectra 5 00 Series System Overview D3657-63001 Models The HP Service Part Number D3657-63001 group contains HP V ectra 500 Series models that have the following features: separate main memory and video memory , and an integrated 32/64 Ultra VGA video graphic controller .
17 1 HP Vectra 50 0 Series System Overview D3661-63001 Model The HP Service Part Number D3661-63001 group contains one HP V ectra 500 Series model that has the following features: separate main memory and a Matrox MGA millennium video card. D3661-63001 - Minitower Model The following table shows the model and its associated product number .
18 1 HP Vectra 5 00 Series System Overview Level-two cache memory (optional) 256 KB synchronous cache are stan dard on the followin g models: U.S./Canada D4403, D4422A, D 4428A, D4437A, D4 439A, D4442.
19 1 HP Vectra 50 0 Series System Overview Comparison of HP Vectra 500 Series Desktop and Minitower Models The HP V ectra 500 Series PCs come in two packages, a desktop box and a minitower box. The following table shows the differences between the two packages.
20 1 HP Vectra 5 00 Series System Overview Principal Features This section includes the principal features of the sy stem board that are available on both the desktop and minitower packages: • An Enhanced IDE controller with two channels on the PCI bus.
21 1 HP Vectra 50 0 Series System Overview Physical and Environmental Specifications The following tables show the phy sical and environmental specifications of the minitower and desktop computers. All the characteristi cs valid for both computers are grouped together at the end of the table.
22 1 HP Vectra 5 00 Series System Overview NOTE Operating temperature and humidity ranges may vary depending upon the mass storage devices installed. High humidity levels can cause improper operation of disk drives. Low humidity ranges can aggravate static electricity problems and cause excessive wear of the disk surface.
23 1 HP Vectra 50 0 Series System Overview Power Consumption NOTE The figures given below are valid for both the minitower and desktop computers with a standard configuration—no expansion cards and no CD-ROM driv e. For other configurations, the power consumption values will be higher.
24 1 HP Vectra 5 00 Series System Overview Rear Panel Connectors The external connectors on the rear panel of the computer are used to connect the mouse, keyboard and display . The 25-pin parallel port can be used for connecting a parallel printer , while the two 9-pin buffered serial ports are for serial printers.
25 1 HP Vectra 50 0 Series CD-ROM Drive Specificatio ns CD-ROM Drive Specifications WARNING To avoid electrical shock and harm to your eyes by laser light, do not open the CD-ROM drive enclosure. Do not attempt to make any adjustment to the CD- ROM drive.
26 1 HP Vectra 5 00 Series CD-ROM Drive Specifica tions.
27 2 System Board - (SiS Chipset) (Part Number: D4051-63001) This section describes the components and features of the SiS (Silicon Integrated Sy stem) chipset-based sy stem board.
28 2 System Board - (SiS Chipset) (Part Number: D4051-63001) Overview Overview The type of sy stem board described in this section uses shared memory based on UMA (Unified Memory Architecture), mea ning that there is no dedicated frame buffer used by the video controller (SiS 6205).
29 2 System Board - (SiS Chipset) (Part Number: D4051-63001) Overview Configuration • Supported Processor: P54CS. • Level-2 (L2) 256 KB cache sockets.
30 2 System Board - (SiS Chipset) (Part Number: D4051-63001) System Board Architecture System Board Architecture The following diagram shows the architecture of the various components and the SiS chipset on the sy stem board.
31 2 System Board - (SiS Chipset) (Part Number: D4051-63001) System Board P hysical Layout System Board Physical Layout The following sy stem board diagram will help you identify where the different components and connections are located on the board.
32 2 System Board - (SiS Chipset) (Part Number: D4051-63001) SiS Chipset SiS Chipset The SiS chipset consists of three chips, each encapsulated in a 208-pin plastic quad flat pack (PQFP) package, that.
33 2 System Board - (SiS Chipset) (Part Number: D4051-63001) SiS Chipset Pentium Processor Level-2 Cache Host Bridge & Memory Controller SiS 5511 CPU Interface Cache Control Memory Control UMA Arb.
34 2 System Board - (SiS Chipset) (Part Number: D4051-63001) SiS Chipset Host/PCI Bridge (SiS 5511 Chip) The SiS 5511 chip (PCMC) bridges between the host bus and the PCI local bus.
35 2 System Board - (SiS Chipset) (Part Number: D4051-63001) SiS Chipset Feature Summary Function Features Cache controller ❒ 8 bits or 7 bits TAG with Direct map ped organi zation. ❒ Write back mode (onl y supported by BIOS) ❒ Uses burst an d pipelin ed burst S RAMs.
36 2 System Board - (SiS Chipset) (Part Number: D4051-63001) SiS Chipset Data Path (SiS 5512 Chip) The SiS 5512 PCI Local Data buffer (PLDB) provides bidirectional data buffering among the 64-bit Host Data Bus, the 64/32-bit Memory Data Bus, and the 32-bit PCI Address/Data Bus.
37 2 System Board - (SiS Chipset) (Part Number: D4051-63001) SiS Chipset Play port. The PSIO supports two bus master IDE channels providing up to four IDE devices. The PSIO does not require any IDE buffering to be used, and therefore no IDE buffers are used.
38 2 System Board - (SiS Chipset) (Part Number: D4051-63001) SiS Chipset System Board Switches and Jumpers (D4051-63001) The sy stem board switches and jumpers are used to configure certain aspects of the computer . SW1 Switch This switch is multi-purpose and is used to modify Flash, CMOS and password settings.
39 2 System Board - (SiS Chipset) (Part Number: D4051-63001) SiS Chipset SW2 Switch This switch is used to select the internal CPU frequency by defining the CPU Bus Frequency / CPU Frequency ratio. If the processor is upgraded, the ratio might have to be changed to adapt to the new processor .
40 2 System Board - (SiS Chipset) (Part Number: D4051-63001) SiS Chipset Cache Jumper This jumper (J6) selects either synchronous or asynchronous cache type. If the PC is not installed with any level-2 cache, the default jumper setting is synchronous cache.
41 2 System Board - (SiS Chipset) (Part Number: D4051-63001) SiS Chipset Processor Socket (D4051-63001) The microprocessor is packaged in a pin-grid-array (PGA), which is seated on the sy stem board in a zero-insertion-force (ZIF) socket.
42 2 System Board - (SiS Chipset) (Part Number: D4051-63001) Backplane (D4051-63001) Backplane (D4051-63001) Desktop Backplane The HP V ectra 500 Series desktop backplane supports two 16-bit ISA (Industry Standard Architecture) cards, one 32-bit PCI (Peripheral Component Interconnect) card and has one combination slot for an ISA or PCI card.
43 2 System Board - (SiS Chipset) (Part Number: D4051-63001) Backplane (D4051-63001) Minitower Backplane The HP V ectra 500 Series minitower backplane supports three 16-bit ISA (Industry Standard Architecture) cards, two 32-bit PCI (Peripheral Component Interconnect) cards and has one combination slot for an ISA or PCI card.
44 2 System Board - (SiS Chipset) (Part Number: D4051-63001) Devices on the Processor Local Bus (D4051-63001) Devices on the Processor Local Bus (D4051-63001) Main Memory (UMA) The SiS 5511 chip can s.
45 2 System Board - (SiS Chipset) (Part Number: D4051-63001) Devices on the Processor Local Bus (D4051-63001) Level-1 Cache Memory The L1 cache memory is divided into two separate banks: • L1 I-cache for instruction words. • L1 D-cache for data words.
46 2 System Board - (SiS Chipset) (Part Number: D4051-63001) Devices on the Processor Local Bus (D4051-63001) Superscalar Architecture The Pentium processor’ s superscalar architecture has two instruction pipelines and a floating-point unit, each capable of independent operation.
47 2 System Board - (SiS Chipset) (Part Number: D4051-63001) Devices on the Processor Local Bus (D4051-63001) The data cache tags (directory entries used to reference cached memory pages) are triple-ported to support two data transfers and an inquire cycle in the same clock cycle.
48 2 System Board - (SiS Chipset) (Part Number: D4051-63001) Devices on the PCI Bu s Devices on the PCI Bus Graphics/Integrated Video (D4051-63001) The HP V ectra 500 Series PC uses the SiS 6205 video controller and supports video resolutions up to 1280 x 1024.
49 2 System Board - (SiS Chipset) (Part Number: D4051-63001) Devices on the PCI B us Integrated Drive Electronics (IDE) Controller The IDE controller is implemented as part of the PCI/ISA bridge chip. It is driven from the PCI bus and has PCI-Master capability .
50 2 System Board - (SiS Chipset) (Part Number: D4051-63001) Devices on the PCI Bu s The BIOS uses the auto-detected drive information to select the fastest configuration supported by each installed IDE drive.
51 2 System Board - (SiS Chipset) (Part Number: D4051-63001) Devices on the PCI B us The three DMA modes allow the following transfer rates: Operated in slave mode, the IDE controller saturates the PCI bus with transfers, thus limiting the actual achieved transfer rate to less than 10 MBytes per second.
52 2 System Board - (SiS Chipset) (Part Number: D4051-63001) Devices on the ISA B us Devices on the ISA Bus Super I/O Chip (NS 87308 or NS 87307) The basic input/output control functions are provided by the Super I/O chip, the NS 87308 or NS 87307. The Super I/O chip is contained within a 160-pin PQFP package.
53 2 System Board - (SiS Chipset) (Part Number: D4051-63001) Devices on the ISA B us Feature Summary Function Features Floppy disk controller ❒ Software compatible with the DP8473, the 765A, and the.
54 2 System Board - (SiS Chipset) (Part Number: D4051-63001) Devices on the ISA B us Serial/Parallel Ports The Super I/O chip supports two serial ports and one bidirectional parallel port. The serial ports are high speed UART s with 16-Byte FIFOs, and can be programmed as COM1, COM2, COM3, COM4, or disabled.
55 2 System Board - (SiS Chipset) (Part Number: D4051-63001) Devices on the ISA B us Floppy Drive Controller The Floppy Drive Controller (FDC) is software and register compatible with the 82077AA, and 100% IBM compatible. It has an A and B drive-swapping capability and a non-burst DMA option.
56 2 System Board - (SiS Chipset) (Part Number: D4051-63001) BIOS (version: GX.07.xx ) BIOS (version: GX.07.xx) The following section is an overview of the BIOS features available with the sy stem identified by the BIOS version: GX.07.xx , installed on the HP Vectra 500 Series PC models with an HP Service Part Number: D4051-63001.
57 3 System Board (P/Ns D3657-63001 and D3661-63001) The two sy stem boards described in this chapter use the Intel SB82437/8 PCI chipset. The two boards are the same except that D3657-63001 has an integrated (onboard) video controller and memory , whereas D3661-63001 uses a Matrox Millennium video card for its video controller and memory .
58 3 System Board (P/Ns D365 7-63001 and D366 1-63001) Overview Overview This section lists the 520 and 525 models and product numbers that use the two sy stem boards D3657-63001 and D3661-63001. D3657-63001 Models Desktop Models The following table lists the desktop models and products that use the D3657-63001 sy stem board.
59 3 System Board (P/Ns D365 7-63001 and D366 1-63001) Overview D3661-63001 Models Minitower Models The following table lists the minitower models and products that use the D3661-63001 sy stem board. Configuration Summary • Supported processors: P54C and P54CS.
60 3 System Board (P/Ns D365 7-63001 and D366 1-63001) System Board Architecture System Board Architecture The following diagram shows the functional relationship between the various components on the sy stem board.
61 3 System Board (P/Ns D365 7-63001 and D366 1-63001) System Board P hysical Layout System Board Physical Layout The following diagram shows the phy sical layout of the sy stem board. * This video up grade applie s only to the models with integrated vide o controller.
62 3 System Board (P/Ns D365 7-63001 and D366 1-63001) Principal Componen ts and Features Principal Components and Features PCI Chipset The PCI chipset consists of four chips that interface between th.
63 3 System Board (P/Ns D365 7-63001 and D366 1-63001) Principal Compone nts and Features PCI, Cache and Memory Controller (SB82437FX-66) The SB82437FX-66 device integrates cache and memory control functions and provides bus control functions for the transfer of information between the microprocessor , cache, main memory and the PCI bus.
64 3 System Board (P/Ns D365 7-63001 and D366 1-63001) Principal Componen ts and Features Data Path Unit (SB82438FX) The SB82438FX component contains a 64-bit data path between the host bus and main memory . A 4×64-bit deep buffer provides 3-1-1-1 writes to main memory .
65 3 System Board (P/Ns D365 7-63001 and D366 1-63001) Principal Compone nts and Features The PCI/ISA Bridge and IDE Controller (SB82371FB) The SB82371FB device serves as a bridge between the PCI bus and the ISA expansion bus, and incorporates a two-channel PCI IDE controller .
66 3 System Board (P/Ns D365 7-63001 and D366 1-63001) Principal Componen ts and Features System Board Configuration Switches The sy stem board configuration switches are used to configure certain aspects of the computer . The sy stem board switches used for configuring the PC are summarized in the following table.
67 3 System Board (P/Ns D365 7-63001 and D366 1-63001) Principal Compone nts and Features Processor Socket The microprocessor is packaged in a pin-grid-array (PGA), which is seated on the sy stem board in a Zero-Insertion-Force (ZIF) socket. VRM Socket P54CS (133 150 and 200 MHz) Pentium processors require a 3.
68 3 System Board (P/Ns D365 7-63001 and D366 1-63001) Principal Componen ts and Features Advanced Power Management (APM) The Advanced Power Management (APM) is a standard, defined by Intel and Microsoft, for a power -saving mode that is applicable under a wide range of operating sy stems.
69 3 System Board (P/Ns D365 7-63001 and D366 1-63001) Principal Compone nts and Features HP Vectra 500 Series Minitower Backplane The HP V ectra 500 Series minitower backplane supports three 16-bit I.
70 3 System Board (P/Ns D365 7-63001 and D366 1-63001) Devices on the Processor Lo cal Bus Devices on the Processor Local Bus The following subsy stems are associated with the Processor Local bus: •.
71 3 System Board (P/Ns D365 7-63001 and D366 1-63001) Devices on the Proces sor Local Bus Using the pipelines halves the instruction execution time and almost doubles the performance of the processor , compared with an Intel486 microprocessor of the same frequency .
72 3 System Board (P/Ns D365 7-63001 and D366 1-63001) Devices on the Processor Lo cal Bus Individual pages of memory can be configured as cacheable or non- cacheable by software or hardware. They can also be enabled and disabled by hardware or software.
73 3 System Board (P/Ns D365 7-63001 and D366 1-63001) Devices on the Proces sor Local Bus The computer will execute erratically , if at all, if the configuration switches are set to operate at a higher processor speed than the processor is capable of supporting.
74 3 System Board (P/Ns D365 7-63001 and D366 1-63001) Devices on the Processor Lo cal Bus Main Memory There are six main memory module sockets on the sy stem board, enabling up to 128 MB of main memory to be installed. The sockets are arranged in three banks (A to C).
75 3 System Board (P/Ns D365 7-63001 and D366 1-63001) Devices on the PCI B us Devices on the PCI Bus The PL/PCI bridge is implemented within the Intel SB82437FX-66 chip (see page 63). It is responsible for transferring data between the Processor -Local bus and the PCI bus.
76 3 System Board (P/Ns D365 7-63001 and D366 1-63001) Devices on the PCI Bu s S3 Trio 64PnP Video Controller The integrated video subsy stem consists of a PCI bus video controller and a DRAM array . The PC uses the S3 T rio 64 PnP video controller . This video controller embeds a RAMDAC, and supports video resolutions of up to 1280 x 1024.
77 3 System Board (P/Ns D365 7-63001 and D366 1-63001) Devices on the PCI B us with two connectors. For desktop models, the primary channel cable is fitted with two connectors, and the secondary channel cable is fitted with one connector .
78 3 System Board (P/Ns D365 7-63001 and D366 1-63001) Devices on the ISA B us Devices on the ISA Bus ThePCI/ISA Bridge chip (also known as PIIX, or as the sy stem I/O chip, SIO- A) is an Intel SB82371FB. It is responsible for transferring data between the PCI bus and the ISA expansion bus.
79 3 System Board (P/Ns D365 7-63001 and D366 1-63001) Devices on the ISA B us • Bidirectional mode (PC/XT, PC/AT, and PS/2 compatible) • Enhanced mode (Enhanced Parallel Port or EPP compatible) • High speed mode (MS/HP Extended Capabilities Port or ECP compatible).
80 3 System Board (P/Ns D365 7-63001 and D366 1-63001) Devices on the ISA B us System ROM The PC uses 128 KB of 200 ns, Flash EEPROM implemented within a single 256 K X 8-bit ROM chip.
81 4 Summary of the HP/Phoenix BIOS This chapter gives an overview of the two different versions of the HP/Phoenix BIOS installed on the HP V ectra 500 Series PC models.
82 4 Summary of the HP/Phoenix BIOS Overview Overview The information concerning the different versions of the HP/Phoenix BIOS installed on the HP V ectra 500 Series models described in this chapter is divided into two main sections: • The sy stem BIOS identified by the version number GX.
83 4 Summary of th e HP/Phoenix BIOS HP/Phoenix BIOS Descrip tion Before flashing, it is necessary to disable the “Secure Mode” switch on the sy stem switches, and to type in the Sy stem Administrator Password when starting up the computer . The PCI and PnP information is erased in the process.
84 4 Summary of the HP/Phoenix BIOS HP/Phoenix BIOS Descrip tion Little Ben Little Ben is an HP application specific i ntegrated circuit (ASIC) that is connected between the chipset and the processor . It has been designed to act as a companion to the Super I/O chip.
85 4 Summary of th e HP/Phoenix BIOS HP/Phoenix BIOS (B IOS version: GX.07.xx) HP/Phoenix BIOS (BIOS version: GX.07.xx) This section gives an overview of the HP/Phoenix BIOS identified by the BIOS version: GX.07.xx associated with the HP V ectra 500 Series models, HP Service Part Number D4051-63001.
86 4 Summary of the HP/Phoenix BIOS HP/Phoenix BIOS (BIOS ve rsion: GX.07.xx) Some fields disappear completely when a choice in another field makes their appearance inappropriate (for example, the “.
87 4 Summary of th e HP/Phoenix BIOS HP/Phoenix BIOS (B IOS version: GX.07.xx) Disabling a device in the Configuration Menu (for example, Serial port B in the diagram above) has the advantage of freeing the resources (such as IRQs and peripheral addresses).
88 4 Summary of the HP/Phoenix BIOS HP/Phoenix BIOS (BIOS ve rsion: GX.07.xx) be locked , so as to prevent the exporting of data. W rites to the har d disk drive boot sector can also be locke d , for instance as a protection against viruses.
89 4 Summary of th e HP/Phoenix BIOS HP/Phoenix BIOS (B IOS version: GX.07.xx) The following summary screen is an example of a sy stem configuration. HP Vectra VE5/100 Series 3 — Copyright 1995 Hewlett-Packard — QA.01.00 Any line of text can be e ntered here as a ‘tatoo’ for the PC BIOS Version : GX.
90 4 Summary of the HP/Phoenix BIOS HP/Phoenix BIOS (BIOS ve rsion: GX.07.xx) I/O Addresses Used by the System (BIOS version: GX.07.xx) Peripheral devices, accessory devices and sy stem controllers are accessed via the sy stem I/O space.
91 4 Summary of th e HP/Phoenix BIOS HP/Phoenix BIOS (B IOS version: GX.07.xx) BIOS I/O Port Map (BIOS version: GX.07.xx) This section describes the HP BIOS port map. The next section provides more details about how the BIOS uses the sy stem board components mentioned in the I/O port list.
92 4 Summary of the HP/Phoenix BIOS HP/Phoenix BIOS (BIOS ve rsion: GX.07.xx) System Board Components (BIOS version: GX.07.xx) This section provides more details of how the BIOS uses the sy stem board components mentioned in the I/O port list. DMA Channel Controllers (BIOS version: GX.
93 4 Summary of th e HP/Phoenix BIOS HP/Phoenix BIOS (B IOS version: GX.07.xx) The following table summarizes how the DMA channels are allocated. Interrupt Controllers (BIOS version: GX.07.xx) The sy stem has two 8259A compatible interrupt controllers.
94 4 Summary of the HP/Phoenix BIOS HP/Phoenix BIOS (BIOS ve rsion: GX.07.xx) Using the Setup program: • IRQ3 can be made available by disabling serial ports 2 and 4. • IRQ4 can be made available by disabling serial ports 1 and 3. • IRQ5 can be made available by disabling the parallel port 2.
95 4 Summary of th e HP/Phoenix BIOS HP/Phoenix BIOS (B IOS version: GX.07.xx) T o see the tests performed during the POST , press when the initial HP “V ectra ” logo appears, and the display will switch to text mode. In this mode, a summary configuration screen will be displayed at the end of the POST .
96 4 Summary of the HP/Phoenix BIOS HP/Phoenix BIOS (BIOS ve rsion: GX.07.xx) Internal Cache Memory Test Tests the processor’s in ternal level-on e cache RAM.
97 4 Summary of th e HP/Phoenix BIOS HP/Phoenix BIOS (B IOS version: GX.07.xx) Error Messages (BIOS version: GX.07.xx) When the PC is switched on or reset, a power -on hardware test is performed. If an error occurs, an error message is displayed. HP’ s new-style BIOS does not display POST error codes (such as 910B).
98 4 Summary of the HP/Phoenix BIOS HP/Phoenix BIOS (BIOS ve rsion: GX.07.xx) Message Corrective Action an d/or Explanat ion Operating system not foun d Check whether the dis k, HDD, FDD or CD-ROM disk drive is connected. If it is connected, check that it is de tected by Setup.
99 4 Summary of th e HP/Phoenix BIOS HP/Phoenix BIOS (B IOS version: GX.07.xx) Beep Codes (BIOS version: GX.07.xx) If a terminal error occurs during POST , the sy stem issues a beep code before attempting to display the error . Beep codes are useful for identifying the error when the sy stem is unable to display the error message.
100 4 Summary of the HP/Phoenix BIOS HP/Phoenix BIOS (BIOS ve rsion: GJ.07.xx) HP/Phoenix BIOS (BIOS version: GJ.07.xx) This section gives an overview of the HP/Phoenix BIOS identified by the version number GJ.07.xx associated with the HP V ectra 500 Series models, HP Service part numbers: D3657-63001 and D3661-63001.
101 4 Summary of th e HP/Phoenix BIOS HP/Phoenix BIOS (B IOS version: GJ.07.xx) Preferences Menu (BIOS version: GJ.07.xx) The Preferences Menu has the same menu structure as the Main Menu and Power Menu. This menu allows the user to set a password to prevent unauthorized access to the computer .
102 4 Summary of the HP/Phoenix BIOS HP/Phoenix BIOS (BIOS ve rsion: GJ.07.xx) Disabling a device in the Configuration Menu (for example, Serial port B in the diagram above) has the advantage of freeing the resources (such as IRQs and peripheral addresses).
103 4 Summary of th e HP/Phoenix BIOS HP/Phoenix BIOS (B IOS version: GJ.07.xx) Summary Configuration Screen (BIOS version: GJ.07.xx) Y ou can press while the initial “V ectra” logo screen is being displayed to run the Setup program (as described in the previous sub-sections).
104 4 Summary of the HP/Phoenix BIOS HP/Phoenix BIOS (BIOS ve rsion: GJ.07.xx) I/O Addresses Used by the System (BIOS version: GJ.07.xx) Peripheral devices, accessory devices and sy stem controllers are accessed via the sy stem I/O space.
105 4 Summary of th e HP/Phoenix BIOS HP/Phoenix BIOS (B IOS version: GJ.07.xx) BIOS I/O Port Map (BIOS version: GJ.07.xx) This section describes the HP BIOS port map. The next section provides more details about how the BIOS uses the sy stem board components mentioned in the I/O port list.
106 4 Summary of the HP/Phoenix BIOS HP/Phoenix BIOS (BIOS ve rsion: GJ.07.xx) Addressing System Board Components (BIOS version: GJ.07.xx) This section provides further details of how the BIOS uses the sy stem board components mentioned in the I/O port list.
107 4 Summary of th e HP/Phoenix BIOS HP/Phoenix BIOS (B IOS version: GJ.07.xx) The following table summarizes how the DMA channels are allocated. Interrupt Controllers (BIOS version: GJ.07.xx) The sy stem has two 8259A compatible interrupt controllers.
108 4 Summary of the HP/Phoenix BIOS HP/Phoenix BIOS (BIOS ve rsion: GJ.07.xx) PCI Interrupt Request Lines (BIOS version: GJ.07.xx) PCI devices generate interrupt requests using up to four PCI interrupt request lines (INT A#, INTB#, INTC#, and INTD#).
109 4 Summary of th e HP/Phoenix BIOS HP/Phoenix BIOS (B IOS version: GJ.07.xx) Power-On Self-Test (BIOS version: GJ.07.xx) This section describes the Power -On Self-T est (POST) routines, which are contained in the PC’ s ROM BIOS, the error messages which can result, and the suggestions for corrective action.
110 4 Summary of the HP/Phoenix BIOS HP/Phoenix BIOS (BIOS ve rsion: GJ.07.xx) POST Test Description System BIOS Tests LED Test Tes ts the LEDs on the con trol panel. Processor Test Tests the processor’s regis ters. Test failure causes the bo ot process to abort.
111 4 Summary of th e HP/Phoenix BIOS HP/Phoenix BIOS (B IOS version: GJ.07.xx) System Board Tests Test External Cache Tests the leve l-two cache. A failure caus es an error co de to display an d disables the external cache. Shadow SCSI ROM Tests for the pres ence of HP SCSI ROMs.
112 4 Summary of the HP/Phoenix BIOS HP/Phoenix BIOS (BIOS ve rsion: GJ.07.xx) Tests of Flexible Disk Dri ve A Flexible Disk Controller Subsystem Test Tests for proper op eration of the flexi ble disk controller. Tes t failure causes an error code to d isplay.
113 4 Summary of th e HP/Phoenix BIOS HP/Phoenix BIOS (B IOS version: GJ.07.xx) Error Messages (BIOS version: GJ.07.xx) When the PC is switched on or reset, a power -on hardware test is performed. If an error occurs, an error message is displayed. NOTE: HP’s new-style BIOS does not display POST error codes (such as 910B).
114 4 Summary of the HP/Phoenix BIOS HP/Phoenix BIOS (BIOS ve rsion: GJ.07.xx) Beep Codes (BIOS version: GJ.07.xx) If a terminal error occurs during POST , the sy stem issues a beep code before attempting to display the error . Beep codes are useful for identifying the error when the sy stem is unable to display the error message.
115 5 Video Controllers This chapter gives details of the three types of video subsy stems used by the HP V ectra 500 Series computers. These video subsy stems are: the SiS 6250 and S3 T rio 64 PnP video controllers, both of which are integrated on the sy stem board, and the Matrox MGA Millennium video card.
116 5 Video Controllers SiS 6205 Video Controller SiS 6205 Video Controller The SiS 6205 video controller supports UMA architecture, and therefore no dedicated video memory is loaded on the sy stem board. The shared frame buffer is located in the sy stem DRAM and the memory access bus and memory data bus.
117 5 Video Controllers SiS 6205 Vide o Controller Upgrading Video Memory (UMA) The default setting for the video memory is 1 MB. The video memory is resident in the main memory , so if there is 12 MB of main memory , 1 MB of this is allocated to the video memory .
118 5 Video Controllers SiS 6205 Video Controller Using the HP Dynamic Video Feature T o increase the amount of video memory using the HP Dynamic video feature, follow these steps: • Click the Start button. • Select Settings, then Control Panel. • Double-click the Display icon.
119 5 Video Controllers SiS 6205 Vide o Controller VESA Feature Connector (SiS 6205 Chip) The Video Electronics Standards Association (VESA) defines a standard video connector , variously known as the VESA feature connector , auxiliary connector , or pass-through connector .
120 5 Video Controllers The Integrated Ultra VGA Vide o Controller The Integrated Ultra VGA Video Controller The Integrated Ultra VGA video controller is installed on the HP Vectra 500 Series PC models with part number D3657-63001.
121 5 Video Controllers The Integrated Ultra V GA Video Controll er S3 Trio 64 Video Memory The S3 T rio 64 PnP integrated video subsy stem has 1 MB of video DRAM preinstalled on the sy stem board, and provides two sockets for the installation of a pair of 512KB video DRAM chips, to upgrade to video memory to 2 MB.
122 5 Video Controllers The Integrated Ultra VGA Vide o Controller Extended V ideo Modes with 1 MB DRAM (S3 Trio 64) 03h VGA text 80 x 25 chars 16 70 31.5 25.175 03h+ VGA text 80 x 25 chars 16 70 31.5 28.322 04h VGA graph 320 x 200 4 70 31.5 25. 175 05h VGA graph 320 x 200 4 70 31.
123 5 Video Controllers The Integrated Ultra V GA Video Controll er 104h 6Ch graph 1024 x 768 1 6 75 60.2 80.000 105h 6D h graph 1024 x 768 256 43 (i) 35.5 44 .900 105h 6D h graph 1024 x 768 256 60 48.4 65.00 0 105h 6D h graph 1024 x 768 256 70 56.5 75.
124 5 Video Controllers The Integrated Ultra VGA Vide o Controller 120 7c graph 1600 x 1 200 256 48.5 (i) 62 65.000 x 2 201 49 graph 640 x 4 80 256 60 31.5 25.175 201 49 graph 640 x 4 80 256 72 37.9 31.500 201 49 graph 640 x 4 80 256 75 37.5 31.500 202 4A graph 800 x 600 16 56 35.
125 5 Video Controllers The Integrated Ultra V GA Video Controll er Extended V ideo Modes with 2 MB DRAM (S3 Trio 64) Typical Windows 95 Video Resolutions (S3 Trio 64) 1.
126 5 Video Controllers The Integrated Ultra VGA Vide o Controller VESA Connector The Video Electronics Standards Association (VESA) defines a standard video connector , variously known as the VESA feature connector , auxiliary connector , or pass-through connector .
127 5 Video Controllers Matrox MGA Millenni um Video Controll er Card Matrox MGA Millennium Video Controller Card The Matrox MGA Millennium PCI video controller is installed in a PCI expansion slot. Its on-card MGA-2064W processor communicates with the Pentium Pro processor along the PCI bus.
128 5 Video Controllers Matrox MGA Millenniu m Video Controller Ca rd MGA Connectors The Video Electronics Standards Association (VESA) defines a standard video connector , variously known as the VESA feature connector , auxiliary connector , or pass-through connector .
129 5 Video Controllers Matrox MGA Millenni um Video Controll er Card Available MGA Video Resolutions The number of colors supported is limited by the video card and the video memory . The resolution/refresh-rate combination is limited by a combination of the display , the graphics card, and the video memory .
130 5 Video Controllers Matrox MGA Millenniu m Video Controller Ca rd The following table summarizes the video resolutions which are supported. The maximum 2D resolutions for any given video memory capacity and color scale can be found from the following table: 1.
131 5 Video Controllers Matrox MGA Millenni um Video Controll er Card MGA Video BIOS A feature of the Matrox MGA Millennium card is the capability t o flash program the video BIOS. This is achieved as follows: 1 Set SW-1, on the Matrox card, to ON (BIOS unprotected).
132 5 Video Controllers DB15 Connector Pinout DB15 Connector Pinout The layout of the pins for the DB15 VGA Connector are the same for the three video controllers mentioned earlier in this section.
6 Aztech AT3300 Audio Fax/Data Modem Depending on the particular HP V ectra 500 Series PC model, there may be an Aztech A T3300 audio fax/data modem installed.
6 Aztech AT3300 Audio Fax/Data Modem Introduction 134 English Introduction The Aztech A T3300 audio fax/data modem operates in Plug and Play mode, therefore the hardware settings should not conflict with those of any other devices on the sy stem.
English 135 6 Aztech AT3300 Audio Fax/Data Modem Introduction Communications Options As a data modem, the modem operates at line speeds of up to 28,800 bps. Error correction (V .42/MNP 2-4) and data compression (V .42 bis/MNP 5) maximize data transfer integrity and boost data throughput up to 115.
6 Aztech AT3300 Audio Fax/Data Modem Introduction 136 English • Fax modem send and receive rates of up to 14,400 bps. V .17/V .29/V .27ter and V21 channel 2, Group 3 Fax mode. • Full duplex speakerphone. • Enhanced AT, voice and class 1 & 2 fax commands.
English 137 6 Aztech AT3300 Audio Fax/Data Modem European Firmware and Telephone Lin e Configu ration European Firmware and Telephone Line Configuration The configuration of the Aztech A T3300 audio fax/data modem is specific to each country’ s telephone standards.
6 Aztech AT3300 Audio Fax/Data Modem European Firmware and Telephone Line Configuration 138 English Aztech AT3300 Localisation Utility The Aztech A T3300 Localisation Utility floppy disk automatically.
English 139 6 Aztech AT3300 Audio Fax/Data Modem European Firmware and Telephone Lin e Configu ration 1 Enter the letter that corresponds to the country to be configured. The message, “Please wait, reprogramming the modem” will be displayed while the Audio Fax/Data Modem is reconfigured.
6 Aztech AT3300 Audio Fax/Data Modem European Firmware and Telephone Line Configuration 140 English 4 After installing and localizing the Aztech AT3300 audio fax/data modem, you must then re-install the Mediatrends Quip software, since its license requires the card’s identification.
English 141 6 Aztech AT3300 Audio Fax/Data Modem European Firmware and Telephone Lin e Configu ration Enter the following A T commands to verify or change the firmware country code: When you have finished, the HyperT erminal session can be saved and used again, or you can exit without saving the session.
6 Aztech AT3300 Audio Fax/Data Modem European Firmware and Telephone Line Configuration 142 English.
143 A AT commands, 141 audio data/fax modem configuration, 137–141 current firmware country code, 138 European firmware, 137 features, 135–136 firmware code, 137 firmware country code, 137 jumper .
144 Index R rear panel display connector, 24 keyboard socket, 24 mouse socket, 24 parallel device socket, 24 serial device connectors, 24 rear panel connectors minitower and desktop, 24 S S3 Trio 64 e.
Index 145 T Typical Windows 95 resolutions S3 Trio 64 video controller, 125 SiS 6205 video controller, 118 U UMA upgrading video memory, 117 using the HP Dynamic video feature, 118 Unified Memory Arch.
146 Index.
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