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M68HC08 Micr ocontr oller s freescale.com Designer Reference Manual Dimmable Light Ballast with Power Factor Correction DRM067 Rev. 1 12/2005.
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Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 Freescale Semiconductor 3 Dimmable Light Ballast with Power Factor Correction Designer Reference Manual by: Petr Frgal Freescale Czech Sy.
Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 4 Freescale Semiconductor Draft 2 for Review.
Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 Freescale Semiconductor 5 Contents Chapter 1 Introduction 1.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Dimmable Light Ballast with P ower Factor Correction 6 Freescale Semiconductor Chapter 5 Software Design 5.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 5.
Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 Freescale Semiconductor 7 Chapter 1 Introduction 1.1 Introduction This reference design describes th e design of a full y digital dimmable light ballast with power factor correction (PFC) control for two parallel connected fluorescent la mps.
Introduction Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 8 Freescale Semiconductor • Energy saving • Ease of adapting software for different lamps • Ease of re-programming the.
The MC68HC908LB8 Microc ontroller Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 Freescale Semiconductor 9 • Dual channel high resolution PWM (HRP) with deadtime insertion and shutdown inpu t to perform light control and dimming functions for ballasts.
Introduction Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 10 Freescale Semiconductor.
Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 Freescale Semiconductor 11 Chapter 2 Control Theory 2.1 Introduction This chapter covers fluoresce nt lamp theory and two PFC concepts - discont in uous conduction mode and hysteresis current control mode.
Control Theory Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 12 Freescale Semiconductor Figure 2-1. Typical Low Pressure Fluorescent Tube I/V Characteristic The value of V strike is a.
Introd uctio n Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 Freescale Semiconductor 13 Figure 2-2. Typical F luorescent Tube Equivalent Circuit in Steady Stat e Up to now, there is no model avai lable to describe the start up sequ ence of these lamps.
Control Theory Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 14 Freescale Semiconductor The operation of a fluorescent tube requires se veral components around the tube, as shown in Figure 2-3 . The gas mixture enclosed in the tub e is ionized by means of a high voltage pulse applied between the two electrodes.
PFC Control Theory Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 Freescale Semiconductor 15 power, battery operated fluorescent tubes are driven with a single switch fly-back topology, but, the output transformer is coupled to the tube by a capacitive network and the current through th e lamp is alternating current.
Control Theory Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 16 Freescale Semiconductor 2.2.2 Digital Power F actor Concept — Hysteresi s Current Control Mode The control technique is based on hysteretic current control.
PFC Control Theory Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 Freescale Semiconductor 17 Figure 2-5. Hystere sis Current Control Mode Current Waveform 2.
+ DC BUS + AC LINE AC DC MCU Reference Volta ge Actual Current Zero Crossing L GND Compara tor DC Bus Volta ge - Current Sensin g IC ADC PWM0 + MOSFET PWM FAULT PIN PWM1 Control Theory Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 18 Freescale Semiconductor Figure 2-6.
PFC Control Theory Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 Freescale Semiconductor 19 Figure 2-8. Generated Input Current Waveform 2.
Control Theory Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 20 Freescale Semiconductor.
Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 Freescale Semiconductor 21 Chapter 3 Reference Design 3.1 Application Outline The presented system is designed to control two par allel connecte d fluorescent lamps.
Ta b l e 3-1. Light Ballast Characteristics Pa r a m et er Unit Va l u e Lamp T ype F18W/33 Input P ower W 8...31 Input Current (230V AC) mA 40...290 Preheat Output F requency kHz 86 Preheat Output Vo l t a g e Vpp 345 Preheat Time ms 900 Running Output F requency Range kHz 50.
FILTE R RECT IFI ER PFC POWER SUPPL Y DRIV ER HALF BRI DG E RESONA NT CIRCU IT DIFFE REN TIAL VOLT AGE FLUOR ESC EN T LAM PS DRIVE R DC -BUS HIGH RESOL UTI ON PWM PWM GENER ATI ON USER IN TE RFA CE MO.
Reference Design Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 24 Freescale Semiconductor the PFC switch in hysteresis current con trol mode or output is used for switch off PWM1 in DCM. Than PWM1 signal is used directly for sw itching the PFC swit ch transistor.
Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 Freescale Semiconductor 25 Chapter 4 Hardware Design 4.1 Hardware Implementation This chapter covers the system hardware implementa tio n. The dimmable light ballast board is shown in Figure 4-1 .
Hardware Design Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 26 Freescale Semiconductor Figure 4-2. Dimmable Light Ballast with Hysteresis PFC HW variation — Hardware Block Diagram 4.2.1 Input and PFC The input and the PFC part provide th e DC-bus voltage to supply the inverter.
System M odules Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 Freescale Semiconductor 27 signal of the comparator (Comp Out) controls the power switch Q1 through the output buffe r, which consists of transistors Q2, Q3, and Q4, resistors R1 0, R13, R34, R35, R36, and R37, a nd capacitor C7.
Hardware Design Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 28 Freescale Semiconductor 4.2.2 Inverter The power inverter generates the proper volta ge for the fluorescent tubes. The power inverte r consists of two MOSFET transistors driven by a half-brid ge driver.
GND 1 2 R19 20R D7 MB R S 1 4 0 GND D6 BAT48 R2 0 10K C16 22nF D G S Q5 IRF830A D G S Q6 IRF830A Vcc 1 HI N 2 LIN 3 COM 4 LO 5 Vs 6 HO 7 VB 8 IC 1 IR 21 0 6 C11 100n F O1 1 O2 2 O3 3 O4 4 O5 5 O6 6 O7.
Hardware Design Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 30 Freescale Semiconductor 4.2.3 Microcontroller The MC68HC908LB8 microcontroller is the co re of th e application. It processe s the input and feedback signals and generates appropriat e control sign als.
TO P GN D BOT Co m p - Co m p Ou t Tu b e Cu r r e n t 1 5V Zer o D et e c t 1 2 3 JP2 Lum ina nc e Le ve l 5V GND Seri al D a t a GN D GN D R2 6 0 0R VD D 1 VSS 2 PT C0/O S C 1 3 PT C1/O S C 2 4 PT C.
Ta b l e 4-2. J2 Interface Header Pin number Signal 1 +5V 2 PTC2 3 PTC0 4 PT A0 5 GND 6 PT A1 Hardware Design Dimmable Light Ballast with P o wer Factor Correction, Rev .
System M odules Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 Freescale Semiconductor 33 4.2.4 Power Supply The function of the switch mode power supply (SMPS) is to feed the inverter and output buffer circuit with 15 V and to supply the micro controller stage by 5 V (see Table 4-3 ).
Hardware Design Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 34 Freescale Semiconductor.
Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 Freescale Semiconductor 35 Chapter 5 Software Design 5.1 Introduction This section describes soft ware features and behavio r of the software in all function modes.
Software Design Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 36 Freescale Semiconductor 5.2.1 Power Factor Correction Control PFC control consists of DC-bus voltage control us ing the PI controller, phase shift synchroniza tion, reference sine wave generation and generation of output PFC control signals.
Control Algori thm Description Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 Freescale Semiconductor 37 is higher than the generated sine waveform, then the comparator output is in log.1 and PWM1 is switched off. This happens every PWM period and this process is called cycle by cycle limiting .
Software Design Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 38 Freescale Semiconductor level adjustment (brightness linearization). The regulation error is then the input value for the PI regulator. The output value from the PI regulator is the HRP period for half bridge power stage.
Software Implementation Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 Freescale Semiconductor 39 5.3 Software Implementation The general software implementation is illustrated in Figure 5-3 . It incorporates the ma in routine entered from Reset and three interrupt states.
Software Design Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 40 Freescale Semiconductor The register CONFIG2 sets: – internal oscillator – IRQ interrupt enabled – IRQPUD must be 0 to connect the in ternal pullup resistor between IRQ pin and V dd .
Software Implementation Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 Freescale Semiconductor 41 – PWM clock frequency set to BUSCLK by prescaler bits PRSC0 and PRSC1 • DISMAP is a write-once register which cont rols t he PWM pins to be disabled if an external fault occurs.
Software Design Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 42 Freescale Semiconductor For BUSCLKX2 = 8 MHz, the HRPDT= $08 3. Set HRPPERH:HRPPERL to select the desired frequency (e.
Software Implementation Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 Freescale Semiconductor 43 5.3.3 Synchronization Interrupt Routine The interrupt procedure is use d for trimming the internal oscillator and for synchro nization of the phase shift of the reference sine wave wit h the mains voltage.
interrupt void pwm ISR(void) End of subroutine Read new (PW M value from table * sine Gain ) Increment of ta ble index W as end of sine tab. reached ? Table index = 0 yes Set 1ms flag and reset 1m s c.
Software Implementation Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 Freescale Semiconductor 45 5.3.4.1 Fault Detection and Processing The following application faults are detected b.
Disable all in terrupts interrupt void faultISR(void) Stop timer and en able tim e r overflow interrupts Stop HRP 1 Blink fault diode Stop PW M Set Vout(PTB7) pin as an output an d set it to l og.
Wait for a moment to sta b i lize internal oscillator Disable all inte rrupts RESET Set PWM : - reset sine tab. pointer - PMOD = PWM_MO DULUS - PVAL0 = 0, PVA L1 = 0; - PCTL2 - reload cy cles PWM prescaler, neg ative polarity, disable PWM1, enable PWM0 - DISMA P - disable PWM1 if ext.
Act ual DC-BUS v oltage < DC-BUS start v oltage ? Is enabled PI P FC stage regulator calculation ? Increment required DC -BUS voltag e by ramp step vol ta g e Required DC-BUS v oltage > DC-BUS s.
Decrement ball ast frequency by ra mp step frequency Is preheat fre quency reached? Has 1ms gone? no yes Calculate PI PFC stage regul ator for reference sine gain phase 3 - Go to preheat frequency 3 H.
4 Set Dimming value and Dimming value array to minimal value Set values of PI PFC stage regulator for run mode: - proportionalGain = PI_KP_RUN; - integral Gain = P I_KI_RUN ; Run mode 1 Is enabled PI .
Microcontroller Usage Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 Freescale Semiconductor 51 5.5 Microcontroller Usage 5.5.1 Microcontroll er Peripheral Usage 5.5.1.1 High Resolution PWM (HRP) The HRP controls the ballast half-bridge power stage.
Software Design Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 52 Freescale Semiconductor 5.5.3 I/O Usage Table 5-2 summarizes the use of the I/O pins.
Definitions of Consta nts and Variables Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 Freescale Semiconductor 53 5.6.1 System Setup Definitions The following constants can be used t o set up the system behavior, according to require d conditions.
Software Design Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 54 Freescale Semiconductor 22. #define MIN_IGNITION_FREQ 45 ...defines the minimum HRP frequency in kHz. 23. #define MAX2PREHEAT_RAMP 100 ...represents the number of frequency ste ps between the maximum HRP frequency and the preheat HRP frequency.
Definitions of Consta nts and Variables Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 Freescale Semiconductor 55 ...represents the integral gain of the PI PFC stag e regulator in run mode. 44. #define PI_SCALE 0 ...represents the scaling factor of the PI PFC stage regulator (2^scale).
Software Design Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 56 Freescale Semiconductor for timing 1 ms intervals. 8. extern tU08 curr_T1; This variable represents the cu rrent in tube 1. 9. extern tU08 curr_T2; This variable represents the cu rrent in tube 2.
Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 Freescale Semiconductor 57 Chapter 6 Demo Setup WARNING This circuit is powered directly fro m the mains voltage supply.
Demo Setup Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 58 Freescale Semiconductor • Discontinuous conduction mode for 50 Hz and for input voltage higher than half of DC-Bus voltage — DCM50HzH.s19 • Discontinuous conduction mo de for 60 Hz and for input voltage lower than half of DC-Bus voltage — DCM60HzL.
Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 Freescale Semiconductor 59 Appendix A. Schematics and Part List A.1 Schematics.
1 2 R34 0R 1 2 R10 6K8 1 2 R35 0R 1 2 R3 220K C B E Q2 BC846B 1 2 R5 220K 1 2 R7 220K E B C Q3 BC856B R13 620R GND 15V C7 100nF GND PFC Gate D15 BAT48 GND Zero Detect C8 82pF D2 BZV55C5V6 1 4 2 3 L6 CMFIL2 15V/1 5 3 1 4 2 6 7 L1 PFCIND3 GND GND 1 2 C1 10nF 275V X2 1 2 C2 150nF 275V X2 C10 220nF 1 2 C5 4n7 250/1000V Y2 2.
1 2 R34 0R 1 2 R10 6K8 1 2 R35 0R 1 2 R3 220K C B E Q2 BC846B 1 2 R5 220K 1 2 R7 220K E B C Q3 BC856B R13 620R GND 15V C7 100nF GND PFC Gate D15 BAT48 GND C8 82pF Zero Detect D2 BZV55C5V6 1 4 2 3 L6 CMFIL2 15V/1 5 3 1 4 2 6 7 L1 PFCIND3 GND GND 1 2 C1 10nF 275V X2 1 2 C2 150nF 275V X2 C10 220nF 1 2 C5 4n7 250/1000V Y2 2.
GND 1 2 R19 20R D7 MBRS140 GND D6 BAT48 R20 10K C16 22nF D G S Q5 IRF830A D G S Q6 IRF830A Vcc 1 HIN 2 LIN 3 COM 4 LO 5 Vs 6 HO 7 VB 8 IC1 IR2106 C11 100nF O1 1 O2 2 O3 3 O4 4 O5 5 O6 6 O7 7 O8 8 J2 T.
TOP GND BOT Comp - Comp Out Tube Current 1 5V Zero Detect 1 2 3 JP2 Luminance Level 5V GND Serial Data GND GND R260 0R VDD 1 VSS 2 PTC0/OSC1 3 PTC1/OSC2 4 PTC2/SHTDWN/IRQ 5 PTB0/TOP 6 PTB1/BOT 7 PTB2/.
TOP GND BOT Comp - Tube Current 1 5V Zero Detect 1 2 C29 150nF GND 1 2 3 JP2 Luminance Level 5V GND Serial Data GND GND R260 0R VDD 1 VSS 2 PTC0/OSC1 3 PTC1/OSC2 4 PTC2/SHTDWN/IRQ 5 PTB0/TOP 6 PTB1/BO.
VCC 1 FB 2 DRAIN 3 GND 4 IC3 NCP1010-SOT223 1 2 + C23 1uF 450V 1 2 + C20 22uF 35V 1 2 C24 1nF 25V L8 4.7mH 1 2 + C21 100uF 35V 1 2 C22 1uF 25V GND 1 2 C25 220nF GND 1 2 3 4 U3 SFH6106 GND GND D14 BZV55C13 D12 MURA160 15V/1 GND R32 390R D13 BZV55C5V1 GND GND 15V 5V DCB TL-RAD EZK Figure A-6.
Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 66 Freescale Semiconductor A.2 Parts List T ab le A-1. Printed Circui t Board P ar ts List DESIGNATORS QUANTITY DESCRIPTION MANUF ACTURE .
Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 Freescale Semiconductor 67 L7 1 1mH CUST OMS - L8 1 4.7mH ANY A CCEPT ABLE 4.7mH - TL-RA D Q1 1 P o wer MOSFET transistor T O-220 INTERNA.
Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 68 Freescale Semiconductor.
Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 Freescale Semiconductor 69 Appendix B. References 1. Electronic Lamp Ba llast Design (AN1543/D), Motorola 1995 2. MON08 Cyclone User Manual, P&E Microcomputer Systems Inc. 2002 3. Opto-isolation Board User Manual, Freescale 2005 4.
Dimmable Light Ballast with P o wer Factor Correction, Rev . 1 70 Freescale Semiconductor.
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