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Agilent 35670A Service Guide Agilent Part Number 35670-90066 Printed in Malaysia Print Date: March 2001 Copyright © Agilent Technologies, Inc., 1992-1995,2000, 2001.
The Agilent 35670A at a Glance (Front Panel).
Agilent 35670A Front Panel 1- Use the softkeys to select items from the current menu. A softkey’s function is indicated by a video label on the analyzer’s screen. Throughout this book, softkeys are printed like this: [ FFT ANALYSIS ]. Hardkeys are front-panel buttons whose functions are always the same.
The Agilent 35670A at a Glance (Rear Panel).
Agilent 35670A Rear Panel 1- The GPIB connector links the Agilent 35670A to other GPIB devices. GPIB parameters are set in the [ Local/GPIB ] and [ Plot/Print ] menus. 2- The SERIAL PORT and the PARALLEL PORT link the analyzer to plotters and printers.
Saftey Summary The following general safety precautions must be observed during all phases of operation of this instrument. Failure to comply with these precautions or with specific warnings elsewhere in this manual violates safety standards of design, manufacture, and intended use of the instrument.
FUSES Only fuses with the required rated current, voltage, and specified type (normal blow, time delay, etc.) should be used. Do not use repaired fuses or short-circuited fuse holders. To do so could cause a shock or fire hazard. DO NOT OPERATE IN AN EXPLOSIVE ATMOSPHERE Do not operate the instrument in the presence of flammable gases or fumes.
Safety Symbols Warning, risk of electric shock Caution, refer to accompanying documents Alternating current Both direct and alternating current Earth (ground) terminal Protective earth (ground) terminal Frame or chassis terminal Terminal is at earth potential.
Accessories The accessories listed in the following table are supplied with the Agilent 35670A. Supplied Accessories Part Number Line Power Cable See page 2-4 Standard Data Format Utilities HP 5061-80.
In This Book This guide provides instructions for installing, verifying performance, and repairing the Agilent 35670A Dynamic Signal Analyzer. Chapter 1, ‘’Specifications,’’ lists the specifications for the Agilent 35670A and the specifications for the required test equipment.
Table of Contents 1 Specifications Frequency 1-3 Single Channel Amplitude 1-4 FFT Dynamic Range 1-5 Input Noise 1-6 Window Parameters 1-6 Single Channel Phase 1-6 Cross Channel Amplitude 1-7 Cross Cha.
2 Preparing the Analyzer for Use To do the incoming inspection 2-5 To install the analyzer 2-7 To connect the analyzer to a dc power source 2-8 To change the fuses 2-10 To connect the analyzer to a se.
To set up the anti-alias filter test 3-23 To set up the input coupling test 3-24 To set up the harmonic distortion test 3-25 To set up the intermodulation distortion test 3-28 To set up the cross talk.
4 Troubleshooting the Analyzer How to troubleshoot the analyzer 4-4 To perform initial verification 4-5 To troubleshoot the power supply 4-11 To troubleshoot power-up failures 4-15 To troubleshoot CPU.
5 Adjusting the Analyzer To adjust the frequency reference 5-5 To adjust the source 5-6 To adjust the ADC gain, offset and reference 5-7 To adjust the input dc offset 5-10 To adjust common mode reject.
7 Replaceable Parts Ordering Information 7-2 Assemblies 7-4 Cables 7-6 Instrument Covers and Handles 7-7 Assembly Covers and Brackets 7-8 Front Panel Parts 7-9 Rear Panel Parts 7-10 Chassis Parts 7-11.
8 Circuit Descriptions Overall Instrument Description 8-2 A1 Input 8-6 A2 Input 8-12 A5 Analog 8-18 A6 Digital 8-22 A7 CPU 8-25 A8 Memory 8-30 A9 NVRAM 8-32 A10 Rear Panel 8-33 A11 Keyboard Controller.
9 Voltages and Signals Assembly Locations and Connections 9-3 Power Supply Voltage Distribution 9-6 A1 Input 9-7 A2 Input 9-7 A8 Memory 9-8 A9 NVRAM 9-12 A10 Rear Panel 9-14 A11 Keyboard Controller 9-.
1 Specifications 1-1.
Specifications This chapter contains the specifications for the Agilent 35670A Dynamic Signal Analyzer and the critical specifications for the equipment required to test the Agilent 35670A. Instrument specifications apply after 15 minutes warm-up and within 2 hours of the last self-calibration.
Frequency Maximum range 1 channel mode 2 channel mode 4 channel mode (option AY6 only) 102.4 kHz, 51.2 kHz (option AY6†) 51.2 kHz 25.6 kHz Spans 1 channel mode 2 channel mode 4 channel mode (option AY6 only) 195.3 mHz to 102.4 kHz 97.7 mHz to 51.2 kHz 48.
Single Channel Amplitude Absolute amplitude accuracy (FFT) (A combination of full scale accuracy, full scale flatness, and amplitude linearity.) ± 2.92% (0.25 dB) of reading ± 0.025% of full scale FFT full scale accuracy at 1 kHz (0 dBfs) ± 0.15 dB (1.
FFT Dynamic Range Spurious free dynamic range (Includes spurs, harmonic distortion, intermodulation distortion, alias products) Excludes alias responses at extremes of span.
Input Noise Input noise level Flat top window, − 51 dBVrms range, source impedance = 50 Ω , 32 rms averages Above 1280 Hz 160 Hz to 1.28 kHz (6.4 kHz span) <–140 dBVrms/ √ — Hz <–130 dBVrms/ √ — H z <%0 > Note: To calculate noise as dB below full scale: Noise [dBfs] = Noise [dBVrms/ Hz ] + 10LOG(NEBW) – Range [dBVrms].
Cross Channel Amplitude FFT cross channel gain accuracy Frequency response mode, same amplitude range (AC coupled, Peroidic Chirp, Uniform Window, > =4Hz) At full scale: Tested with 10 rms averages on the − 11 to +27 dBvrms ranges, and 100 rms averages on the − 51 dBVrms range ± 0.
Input Input ranges (full scale) (auto-range capability) +27 dBVrms (31.7 Vpk) to − 51 dBVrms (3.99 mVpk) in 2 dB steps Maximum input levels 42 Vpk Input impedance 1M Ω ±10%, 90 pF nominal Low side to chassis impedance Floating mode Grounded mode 1M Ω ±30%, <0.
Time Domain Specifications apply in histogram/time mode, unfiltered time display DC amplitude accuracy ± 5 . 0%f s Rise time of − 1 V to 0 V test pulse <11.
Tachometer Pulses per revolution 0.5 to 2048 RPM accuracy ± 100 ppm (0.01%) (typical) Tachometer level range Low range High range – 4Vt o+ 4V –20 V to +20 V Tachometer level resolution Low range .
Source Output Source types Sine, random noise, chirp, pink noise, burst random, burst chirp Amplitude range ac: ± 5 V peak † dc: ± 1 0V† † Vac pk + |Vdc| ≤ 10 V AC amplitude resolution Voltage ≥ 0.
Digital Interfaces External keyboard Compatible with PC-style 101-key keyboard model number HP C1405A (#ABA) (DIN connector) and HP keyboard cable part number 5081-2249. GPIB Conforms to the following standards: IEEE 488.1 (SH1, AH1, T6, TEO, L4, LE0, RS1, RL1, PP0, DC1, DT1, C1, C2, C3, C12, E2) IEEE 488.
General Specifications Safety Standards CSA Certified for Electronic Test and Measurement Equipment per CSA C22.2, No. 231 This product is designed for compliance to: UL1244, Fourth Edition IEC 348, S.
Order Tracking — Option 1D0 Max Order Max RPM 60 × ≤ Real time (online) 1 channel mode 2 channel mode 4 channel mode 25,600 Hz 12,800 Hz 6,400 Hz Capture playback † 1 channel mode 2 channel mod.
Swept Sine Measurements —Option 1D2 Dynamic range Default span: 51.2 Hz to 51.2 kHz Fast average ON, 101 point log sweep Tested with 11 dBVrms source level at 100 ms integration (approximately 60 se.
Real Time Octave Analysis — Option 1D1 Standards Conforms to ANSI Standard S1.11 - 1986, Order 3, Type 1-D, Extended and Optional Frequency Ranges Conforms to IEC 651-1979 Type 0 Impulse, and ANSI S1.4 Frequency ranges (at centers) Online (real time) 1/1 octave 1/3 octave 1/12 octave 1 channel 0.
Recommended Test Equipment The following table lists the recommended equipment needed to test the performance of the Agilent 35670A Dynamic Signal Analyzer. The table on page 1-20 lists additional equipment needed to adjust and troubleshoot the analyzer.
Recommended Test Equipment (continued) Instrument Critical Specifications Recommended Model Cables BNC-to-Dual Banana (6) BNC-to-BNC 30 cm BNC-to-BNC 122 cm HP 11001-60001 HP 8120-1838 HP 8120-1840 Ad.
Schematic and Parts List for Notch Filter The Harmonic Distortion performance test requires either an HP 339A or an HP 3326A or HP 3325A/B with notch filter. The following shows the schematic and parts list for the notch filter. Reference Description Agilent Part Number C 1-C 4 0.
Additional Recommended Test Equipment Instrument Critical Specifications Recommended Model Frequency Counter Frequency Range: 0 Hz to 100 MHz Frequency Accuracy: 7.
2 Preparing the Analyzer for Use 2-1.
Preparing the Analyzer for Use This chapter contains instructions for inspecting and installing the Agilent 35670A Dynamic Signal Analyzer. This chapter also includes instructions for cleaning the screen, transporting and storing the analyzer. DC Power Requirements The analyzer can operate from a dc power source supplying a true range of 10.
DC Power Cable and Grounding Requirements The negative side of the dc input connector is not connected to chassis ground. In dc mode operation, the chassis will float. The chassis ground lug on the rear panel and the negative side of the dc input connector should both be connected to a known reference potential.
*The number shown for the plug is the industry identifier for the plug only, the number shown for the cable is an HP part number for a complete cable including the plug. **UL listed for use in the United States of America. Warning The power cable plug must be inserted into an outlet provided with a protective earth terminal.
To do the incoming inspection The Agilent 35670A Dynamic Signal Analyzer was carefully inspected both mechanically and electrically before shipment. It should be free of marks or scratches, and it should meet its published specifications upon receipt.
• Check that the correct fuses are installed in the fuse holders. An 8 amp, 250 volt, normal blow fuse is required for ac operation. A 30 amp, 32 volt, normal blow fuse is required for dc operation. Both fuses are installed at the factory. For instructions on removing the fuses or fuse part numbers, see ‘’To change the fuses.
To install the analyzer The analyzer is shipped with rubber feet and bail handle in place, ready for use as a portable or bench analyzer. • Install the analyzer to allow free circulation of cooling air. Cooling air enters the analyzer through the right side and exhausts through the left side and rear panel.
To connect the analyzer to a dc power source In applications requiring a portable dc power source, use a properly protected dc power system. The dc system should contain a deep cycle battery rather than a standard automobile battery. A standard automobile battery will fail prematurely if repeatedly discharged.
• Turn on the dc power source. If the dc power source is supplied by an automobile, start the automobile. The automobile must be running to provide adequate dc power. Warning The tip of the cigarette lighter adapter may get hot during use. After unpluging the adapter, be careful of the heat from the adapter’s tip.
To change the fuses Both fuses are installed at the factory. • Unplug the power cord from the analyzer. • Press in and turn the appropriate fuse holder cap counter-clockwise (use a small screw driver for the ac fuse). Remove when the fuse cap is free from the housing.
To connect the analyzer to a serial device The Serial Port is a 9-pin, EIA-574 port that is only available using option 1C2, Instrument Basic. The total allowable transmission path length is 50 feet. • Connect the analyzer’s rear panel SERIAL PORT to a serial device using a 9-pin female to 25-pin RS-232-C cable.
To connect the analyzer to an GPIB device The analyzer is compatible with the Agilent Technologies Interface Bus (GPIB). The GPIB is Agilent Technologies’s implementation of IEEE Standard 488.1. Total allowable transmission path length is 2 meters times the number of devices or 20 meters, whichever is less.
To connect the analyzer to an external monitor The External Monitor connector is a 9-pin D female miniature connector that can interface with an external, multisync monitor. The monitor must be compatible with the 24.8 kHz line rate, 55 Hz frame rate, and TTL signals provided by the Agilent 35670A.
To connect the optional keyboard The analyzer may be connected to an optional external keyboard. The keyboard remains active even when the analyzer is not in alpha entry mode. This means that you can operate the analyzer using the external keyboard rather than the front panel.
• Connect the other end of the keyboard cable to the keyboard. Caution In addition to the U.S. English keyboard, the Agilent 35670A Dynamic Signal Analyzer supports U.K. English, German, French, Italian, Spanish, and Swedish. Use only the Agilent Technologies approved keyboard for this product.
To connect the microphone adapter The Microphone Adapter and Power Supply (option UK4) simplifies microphone connections. The mic connector on the analyzer’s front panel provides 8 Vdc to power the adapter. The adapter’s internal power supply uses a step-up converter to provide 28 V and 200 V on the seven-pin input connectors.
To clean the screen The analyzer’s display is covered with a plastic diffuser screen (this is not removable by the operator). Under normal operating conditions, the only cleaning required will be an occasional dusting. However, if a foreign material adheres itself to the screen, do the following: • Set the power switch to off ( O ).
To transport the analyzer • Package the analyzer using the original factory packaging or packaging identical to the factory packaging. Containers and materials identical to those used in factory packaging are available through Agilent Technologies offices.
If the analyzer will not power up Check that the power cord is connected to the Agilent 35670A and to a live power source. Check that the front-panel switch is on ( l ). Check that the rear-panel AC/DC power select switch is properly set. Check that the fuse is good.
If the analyzer operates intermittently on dc power The analyzer powers down when operating on dc power if no measurement has been made within 30 minutes. Check that the dc power source can supply the required power. The dc power source must have a true range of 10.
3 Verifying Specifications 3-1.
Verifying Specifications This chapter tells you how to use the Agilent 35670A Semiautomated Performance Test Disk . The performance test disk contains a program that semiautomates the operation verification tests and performance tests.
Features of the Program • The program can automatically create a printout similar to the test records at the back of this chapter. • The program can beep when equipment connections need to be changed. • The program can start the test sequence at any test in the operation verification or performance test list.
Program Controlled Test Equipment This program automatically controls the instruments listed in the following table using GPIB commands. If you use a test instrument other than those shown in the table, the program prompts you to set the instrument state during testing.
Operation Verification Tests Performance Tests Self Test Self Test DC Offset DC Offset Noise Noise Spurious Signals Spurious Signals Amplitude Accuracy Amplitude Accuracy Flatness Flatness Amplitude L.
Specifications and Performance Tests The following table lists specifications and the performance test or tests that verify each specification. Specification Performance Test Frequency Accuracy Freque.
To load the program For information about the program’s softkeys, see the menu descriptions starting on page 3-51. • Set the Agilent 35670A Dynamic Signal Analyzer’s power switch to off ( O ), then connect the analyzer, test instruments, and printer using GPIB cables.
To run the program in semiautomated mode You must have an GPIB printer connected to your system to run the program in semiautomated mode. If you do not have a printer, see ‘’To run the program without a printer’’ later in this chapter.
• Press the following keys and type in the printer address when the program prompts you: [ TEST CONFIG ] [ PRINTER ADDRESS ] [ PROCEDURE ] [ OP_VERIFY ]o r[ PERFORMAN ] [ STOP AFTER ] [ LIMIT FAILUR.
To run the program without a printer Use this procedure if you do not have an GPIB printer connected to yout system. • Write in the information needed on the title page of the selected test record. The test records are located near the back of this chapter and may be copied without written permission of Agilent Technologies.
• Now follow the directions on the display and record every measurement result in the selected test record. Warning During the test, the program prompts you to change the test equipment connections. Always turn the ac calibrator output to OFF or STANDBY before changing test equipment connections.
To run the program in manual mode Use this procedure if you want to run the program in manual mode. You will be prompted to set up all test equipment and you can check the analyzer’s setup state after each measurement. • Write in the information needed on the title page of the selected test record.
To set up the self test Performance Test and Operation Verification This test checks the measurement hardware in the Agilent 35670A. No performance tests should be attempted until the analyzer passes this test. This test takes approximately one minute to complete, and requires no external equipment.
To set up the dc offset test Performance Test and Operation Verification This test verifies that the Agilent 35670A meets its single channel amplitude specification for residual dc responses. In this test, the Agilent 35670A measures its internal residual dc offset at two amplitudes.
To set up the noise test Performance Test and Operation Verification This test verifies that the Agilent 35670A meets its input noise specification. In this test, the Agilent 35670A measures its internal noise level.
To set up the spurious signals test Performance Test and Operation Verification This test verifies that the Agilent 35670A meets its FFT dynamic range specification for spurious and residual responses. In this test, the Agilent 35670A measures its internal spurious signals.
To set up the amplitude accuracy test Performance Test and Operation Verification This test verifies that the Agilent 35670A meets its single channel amplitude specification for FFT full scale accuracy at 1 kHz. In this test, an ac calibrator outputs a 1 kHz signal with an exact amplitude to all channels.
To set up the flatness test Performance Test and Operation Verification This test verifies that the Agilent 35670A meets its single channel amplitude specification for FFT full scale flatness relative to 1 kHz. In this test, the ac calibrator outputs a signal with an exact amplitude to all channels.
To set up the amplitude linearity test Performance Test and Operation Verification This test verifies that the Agilent 35670A meets its single channel amplitude specification for FFT amplitude linearity at 1 kHz. In this test, the ac calibrator outputs a 1 kHz signal with an an exact amplitude to all channels.
To set up the A-weight filter test Performance Test and Operation Verification This test verifies that the Agilent 35670A meets its input specification for A-weight filter. In this test, an ac calibrator outputs a 1 dBVrms signal with an exact amplitude to all channels.
To set up the channel match test Performance Test and Operation Verification This test verifies that the Agilent 35670A meets its cross channel amplitude and cross channel phase specification. In this test, the Agilent 35670A’s source outputs an identical signal to all channels.
To set up the frequency accuracy test Performance Test and Operation Verification This test verifies that the Agilent 35670A meets its frequency accuracy specification.
To set up the anti-alias filter test Performance Test only This test verifies that the Agilent 35670A meets its FFT dynamic range specification for frequency alias responses. In this test, a frequency synthesizer outputs a − 9 dBVrms signal known to cause an alias frequency to all channels.
To set up the input coupling test Performance Test only This test verifies that the Agilent 35670A meets its input specification for ac coupling rolloff. In this test, a frequency synthesizer outputs a 1 Hz signal to all channels. The signal is measured in both ac and dc coupled modes.
To set up the harmonic distortion test Performance Test only This test verifies that the Agilent 35670A meets its FFT dynamic range specification for harmonic distortion. In this test, a low distortion oscillator or a frequency synthesizer and 24.5 kHz notch filter outputs a signal to all channels.
1 A 2c h Using a synthesizer and notch filter 2A 2c h Using a synthesizer and notch filter 1 A 4c h Using a synthesizer and notch filter Verifying Specifications Agilent 35670A To set up the harmonic .
2 A 4c h Using a synthesizer and notch filter Agilent 35670A Verifying Specifications To set up the harmonic distortion test 3-27.
To set up the intermodulation distortion test Performance Test only This test verifies that the Agilent 35670A meets its FFT dynamic range specification for intermodulation distortion. In this test, two signals are combined to provide a composite signal to all channels.
1 A 2c h Using 2 HP 3325’s 1 A 4c h Using 2 HP 3325’s Agilent 35670A Verifying Specifications To set up the intermodulation distortion test 3-29.
To set up the cross talk test Performance Test only This test verifies that the Agilent 35670A meets its input specification for channel-to-channel and channel-to-source cross talk. In this test, the Agilent 35670A measures the amount of energy induced from the source or input channel to another input channel.
3 2c h 1 4c h 2 4c h Agilent 35670A Verifying Specifications To set up the cross talk test 3-31.
3 4c h 4 4c h Verifying Specifications Agilent 35670A To set up the cross talk test 3-32.
5 4c h Agilent 35670A Verifying Specifications To set up the cross talk test 3-33.
To set up the single channel phase accuracy test Performance Test and Operation Verification This test verifies that the Agilent 35670A meets its single channel phase accuracy specification. In this test, a frequency synthesizer outputs an identical square wave to all channels and a synchronized TTL-level signal to the trigger input.
To set up the external trigger test Performance Test only This test verifies that the Agilent 35670A meets its trigger specification for external trigger level accuracy. In this test, a frequency synthesizer outputs a 1 kHz signal to the external trigger input and a 12.
1A 2c h Using two HP 3325’s 1A 4c h Using two HP 3325’s Verifying Specifications Agilent 35670A To set up the external trigger test 3-36.
To set up the tach function test Performance Test and Operation Verification This test is only for Agilent 35670A’s with option 1D0, computed order tracking. This test verifies that the Agilent 35670A meets its tachometer specification for trigger level accuracy.
1A 2c h Using two HP 3325’s 1A 4c h Using two HP 3325’s Verifying Specifications Agilent 35670A To set up the tach function test 3-38.
To set up the input resistance test Performance Test only This test verifies that the Agilent 35670A meets its input resistance specification. In this test, a digital multimeter directly measures the input resistance of each channel. The digital multimeter is set to the 1 M Ω range.
2 4c h 3 4c h 4 4c h Verifying Specifications Agilent 35670A To set up the input resistance test 3-40.
To set up the ICP supply test Performance Test and Operation Verification This test verifies that the Agilent 35670A meets its input specification for ICP signal conditioning. In this test, a digital multimeter directly measures the open circuit voltage of each channel.
3 2c h 4 2c h 1 4c h 2 4c h Verifying Specifications Agilent 35670A To set up the ICP supply test 3-42.
3 4c h 4 4c h 5 4c h 6 4c h Agilent 35670A Verifying Specifications To set up the ICP supply test 3-43.
7 4c h 8 4c h Verifying Specifications Agilent 35670A To set up the ICP supply test 3-44.
To set up the source amplitude accuracy test Performance Test and Operation Verification This test verifies that the Agilent 35670A meets its source output specification for sine amplitude accuracy at 1 kHz. In this test, a digital multimeter measures the amplitude accuracy of the source.
To set up the source output resistance test Performance Test only This test verifies that the Agilent 35670A meets its source output specification for resistance.
3 2c h 1 4c h 2 4c h 3 4c h Agilent 35670A Verifying Specifications To set up the source output resistance test 3-47.
To set up the source dc offset test Performance Test only This test verifies that the Agilent 35670A meets its source output specification for dc offset accuracy. In this test, a digital multimeter measures the dc offset voltage of the source with and without an ac component.
To set up the source flatness test Performance Test and Operation Verification This test verifies that the Agilent 35670A meets its source output specification for sine flatness. In this test, the analyzer’s channel 1 input measures the flatness of its source.
To set up the source distortion test Performance Test and Operation Verification This test verifies that the Agilent 35670A meets its source output specification for harmonic and sub-harmonic distortion and spurious signals. In this test, the analyzer’s source is connected to its channel 1 input.
Agilent 35670A Verifying Specifications 3-51 ITM_35670A Main Menu Descriptions If you do not have a keyboard connected to the analyzer, use the numeric key pad and the alpha keys to enter names or numbers. See the analyzer’s help text for a description of the alpha keys.
Verifying Specifications Agilent 35670A 3-52 Start Testing Menu Descriptions Press [ START TESTING ] to display the following softkeys: [ START BEGINNING ] Prints the test record title page information and starts the selected test procedure at the beginning.
Agilent 35670A Verifying Specifications 3-53 Test Configuration Menu Descriptions Press [ TEST CONFIG ] to display the test configuration and the following softkeys: [ Agilent 35670A ADDRESS ] Prompts you to enter the GPIB address for the Agilent 35670A Dynamic Signal Analyzer.
Verifying Specifications Agilent 35670A 3-54 Equipment Configuration Menu Descriptions Press [ EQUIP CONFIG ] to display the test equipment configuration and the following softkeys: [ AC CALIBRATO ] Prompts you to enter the model, serial number, GPIB address, and calibration due date for the ac calibrator.
Agilent 35670A Verifying Specifications 3-55 Title Page Menu Descriptions Press [ TITLE PAGE ] to display the title page information and the following softkeys: [ TEST FACILITY ] Prompts you to enter the name or number of the testing entity. [ FACILITY ADDRESS ] Prompts you to enter the address of the testing entity.
Measurement Uncertainty The following table lists the measurement uncertainty and ratio for each performance test using the recommended test equipment. Except for the External Trigger test, the ratios listed for the recommended test equipment meet or exceed the measurement uncertainty ratio required by U.
Performance Test Using Recommended Test Equipment Using Other Test Equipment Measurement Uncertainty Ratio Measurement Uncertainty Ratio Amplitude Linearity 13 dBVrms − 1 dBVrms − 15 dBVrms − 29 dBVrms − 43 dBVrms − 53 dBVrms ± 0.0020 dB ± 0.
† The sync output to signal output phase error was determined to be less than 0.25 degrees. ‡ If measured value is within 3% of specification, verify synthesizer level accuracy. Note: Without 50 Ω termination, observed levels are twice the setting into high impedance.
Performance Test Record - Two Channel Test Facility ___________________________________________________________ Facility Address ________________________________________________________ Tested By ____.
Self Test Measurement Lower Limit Upper Limit Measured Value Pass/Fail Long Confidence DC Offset Measurement Lower Limit Upper Limit (dBfs) Measured Value (dBfs) Pass/Fail − 51 dBVrms, Ch 1 − 15 .
Spurious Signals Two Ch, 0 Hz Start, Ch 1 − 80 Two Ch, 0 Hz Start, Ch 2 − 80 Two Ch, 200 Hz Start, Ch 1 − 80 Two Ch, 200 Hz Start, Ch 2 − 80 Two Ch, 400 Hz Start, Ch 1 − 80 Two Ch, 400 Hz St.
Two Ch, 14400 Hz Start, Ch 2 − 80 Two Ch, 16000 Hz Start, Ch 1 − 80 Two Ch, 16000 Hz Start, Ch 2 − 80 Two Ch, 17600 Hz Start, Ch 1 − 80 Two Ch, 17600 Hz Start, Ch 2 − 80 Two Ch, 19200 Hz Sta.
Two Ch, 43200 Hz Start, Ch 1 − 80 Two Ch, 43200 Hz Start, Ch 2 − 80 Two Ch, 44800 Hz Start, Ch 1 − 80 Two Ch, 44800 Hz Start, Ch 2 − 80 Two Ch, 46400 Hz Start, Ch 1 − 80 Two Ch, 46400 Hz Sta.
Spurious Signals (continued) Measurement Lower Limit Upper Limit (dBfs) Measured Value (dBfs) Pass/Fail One Ch, 88800 Start, Ch 1 − 80 One Ch, 97000 Start, Ch 1 − 80 One Ch, 98600 Start, Ch 1 − .
Measurement Lower Limit (dB) Upper Limit (dB) Measured Value (dB) Pass/Fail − 11 dBVrms, 99.84 kHz, One Ch, Ch 1 − 0.2 0.2 27 dBVrms, 51.2 kHz, Two Ch, Ch 1 − 0.2 0.2 27 dBVrms, 51.2 kHz, Two Ch, Ch 2 − 0.2 0.2 9 dBVrms, 51.2 kHz, Two Ch, Ch 1 − 0.
A-Weight Filter Measurement Lower Limit (dB) Upper Limit (dB) Measured Value (dB) Pass/Fail Ch 1, 10 Hz − 5 2 Ch 2, 10 Hz − 5 2 Ch 1, 31.62 Hz − 1 1 Ch 2, 31.62 Hz − 1 1 Ch 1, 100 Hz − 0.7 0.7 Ch 2, 100 Hz − 0.7 0.7 Ch 1, 1000 Hz − 0.7 0.
Frequency Accuracy Measurement Lower Limit (kHz) Upper Limit (kHz) Measured Value (kHz) Pass/Fail 50 kHz 49.9985 50.0015 Anti-Alias Filter Measurement Lower Limit Upper Limit (dBfs) Measured Value (dBfs) Pass/Fail One Ch, Ch 1, 102.4 kHz − 80 Two Ch, Ch 1, 51.
Harmonic Distortion Measurement Lower Limit Upper Limit (dBfs) Measured Value (dBfs) Pass/Fail Single, 12.25 kHz 2nd, Ch 1 − 80 Two Ch, 12.25 kHz 2nd, Ch 1 − 80 Two Ch, 12.25 kHz 2nd, Ch 2 − 80 Single, 8.167 kHz 3rd, Ch 1 − 80 Two Ch, 8.167 kHz 3rd, Ch 1 − 80 Two Ch, 8.
Intermodulation Distortion Measurement Lower Limit Upper Limit (dBfs) Measured Value (dBfs) Pass/Fail One Ch, F1+F2, 102.4 kHz, Ch 1 − 80 One Ch, F1+F2, 64.
Single Ch Phase Accuracy Measurement Lower Limit (deg) Upper Limit (deg) Measured Value (deg) Pass/Fail Positive slope, Ch 1 − 4 4 Positive slope, Ch 2 − 4 4 Negative slope, Ch 1 − 4 4 Negative .
Input Resistance Measurement Lower Limit (%) Upper Limit (%) Measured Value (%) Pass/Fail 27 dBVrms, Ch 1 − 10 10 9 dBVrms, Ch 1 − 10 10 − 11 dBVrms, Ch 1 − 10 10 27 dBVrms, Ch 2 − 10 10 9 d.
Source DC Offset Measurement Lower Limit (mVdc) Upper Limit (mVdc) Measured Value (mVdc) Pass/Fail 0 Vdc, 0 Vac(pk) − 15 15 − 10 Vdc, 0 Vac(pk) − 315 315 +10 Vdc, 0 Vac(pk) − 315 315 − 5 Vdc.
Performance Test Record - Four Channel Test Facility ___________________________________________________________ Facility Address ________________________________________________________ Tested By ___.
Self Test Measurement Lower Limit Upper Limit Measured Value Pass/Fail Long Confidence DC Offset Measurement Lower Limit Upper Limit (dBfs) Measured Value (dBfs) Pass/Fail − 51 dBVrms, Ch 1 − 15 .
Spurious Signals Measurement Lower Limit Upper Limit (dBfs) Measured Value (dBfs) Pass/Fail Four Ch, 0 Hz Start, Ch 1 − 80 Four Ch, 0 Hz Start, Ch 2 − 80 Four Ch, 0 Hz Start, Ch 3 − 80 Four Ch, .
Four Ch, 1600 Hz Start, Ch 1 − 80 Four Ch, 1600 Hz Start, Ch 2 − 80 Four Ch, 1600 Hz Start, Ch 3 − 80 Four Ch, 1600 Hz Start, Ch 4 − 80 Four Ch, 3200 Hz Start, Ch 1 − 80 Four Ch, 3200 Hz Sta.
Four Ch, 14400 Hz Start, Ch 3 − 80 Four Ch, 14400 Hz Start, Ch 4 − 80 Four Ch, 16000 Hz Start, Ch 1 − 80 Four Ch, 16000 Hz Start, Ch 2 − 80 Four Ch, 16000 Hz Start, Ch 3 − 80 Four Ch, 16000 .
Spurious Signals (continued) Four Ch, 20800 Hz Start, Ch 3 − 80 Four Ch, 20800 Hz Start, Ch 4 − 80 Four Ch, 22400 Hz Start, Ch 1 − 80 Four Ch, 22400 Hz Start, Ch 2 − 80 Four Ch, 22400 Hz Start.
Two Ch, 44800 Hz Start, Ch 1 − 80 Two Ch, 44800 Hz Start, Ch 2 − 80 Two Ch, 46400 Hz Start, Ch 1 − 80 Two Ch, 46400 Hz Start, Ch 2 − 80 Two Ch, 48000 Hz Start, Ch 1 − 80 Two Ch, 48000 Hz Sta.
Amplitude Accuracy (continued) Measurement Lower Limit Upper Limit (dBfs) Measured Value (dBfs) Pass/Fail − 35 dBVrms, Ch 2 − 35.15 − 34.85 − 35 dBVrms, Ch 3 − 35.15 − 34.85 − 35 dBVrms, Ch 4 − 35.15 − 34.85 − 27 dBVrms, Ch 1 − 27.
Flatness Measurement Lower Limit (dB) Upper Limit (dB) Measured Value (dB) Pass/Fail 27 dBVrms, 51.2 kHz, One Ch, Ch 1 − 0.2 0.2 9 dBVrms, 51.2 kHz, One Ch, Ch 1 − 0.2 0.2 − 11 dBVrms, 51.2 kHz, One Ch, Ch 1 − 0.2 0.2 27 dBVrms, 51.2 kHz, Two Ch, Ch 1 − 0.
Amplitude Linearity Measurement Lower Limit (dB) Upper Limit (dB) Measured Value (dB) Pass/Fail 13 dBVrms, Ch 1 − 0.0615 0.061 13 dBVrms, Ch 2 − 0.0615 0.061 13 dBVrms, Ch 3 − 0.0615 0.061 13 dBVrms, Ch 4 − 0.0615 0.061 − 1 dBVrms, Ch 1 − 0.
A-Weight Filter Measurement Lower Limit (dB) Upper Limit (dB) Measured Value (dB) Pass/Fail Ch 1, 10 Hz − 5 2 Ch 2, 10 Hz − 5 2 Ch 3, 10 Hz − 5 2 Ch 4, 10 Hz − 5 2 Ch 1, 31.62 Hz − 1 1 Ch 2, 31.62 Hz − 1 1 Ch 3, 31.62 Hz − 1 1 Ch 4, 31.62 Hz − 1 1 Ch 1, 100 Hz − 0.
Channel Match Two Ch, 2/1, 7 dBV FS Mag − 0.04 0.04 Two Ch, 2/1, 7 dBV FS Phs − 0.5 0.5 Two Ch, 2/1, − 13 dBV FS Mag − 0.04 0.04 Two Ch, 2/1, − 13 dBV FS Phs − 0.5 0.5 Two Ch, 2/1, − 33 dBV FS Mag − 0.04 0.04 Two Ch, 2/1, − 33 dBV FS Phs − 0.
Four Ch, 4/3, 7 dBV FS Phs − 0.5 0.5 Four Ch, 4/3, − 13 dBV FS Mag − 0.04 0.04 Four Ch, 4/3, − 13 dBV FS Phs − 0.5 0.5 Four Ch, 4/3, − 33 dBV FS Mag − 0.04 0.04 Four Ch, 4/3, − 33 dBV FS Phs − 0.5 0.5 Four Ch, 4/3, 7 dBV − 20 dBfs Mag − 0.
Frequency Accuracy Measurement Lower Limit (kHz) Upper Limit (kHz) Measured Value (kHz) Pass/Fail 50 kHz 49.9985 50.0015 Anti-Alias Filter Measurement Lower Limit Upper Limit (dBfs) Measured Value (dBfs) Pass/Fail One Ch, Ch 1, 51.2 kHz − 80 Two Ch, Ch 1, 51.
Harmonic Distortion Measurement Lower Limit Upper Limit (dBfs) Measured Value (dBfs) Pass/Fail Two Ch, 12.25 kHz 2nd, Ch 1 − 80 Two Ch, 12.25 kHz 2nd, Ch 2 − 80 Four Ch, 12.25 kHz 2nd, Ch 1 − 80 Four Ch, 12.25 kHz 2nd, Ch 2 − 80 Four Ch, 12.25 kHz 2nd, Ch 3 − 80 Four Ch, 12.
Intermodulation Distortion Measurement Lower Limit Upper Limit (dBfs) Measured Value (dBfs) Pass/Fail Two Ch, F1+F2, 1952 Hz, Ch 1 − 80 Two Ch, F1+F2, 1952 Hz, Ch 2 − 80 Two Ch, F1 − 2F2, 1048 Hz, Ch 1 − 80 Two Ch, F1 − 2F2, 1048 Hz, Ch 2 − 80 Two Ch, F1+F2, 48.
Cross Talk Measurement Lower Limit Upper Limit (dBVrms) Measured Value (dBVrms) Pass/Fail Source-to-Ch 1 − 126 Source-to-Ch 2 − 126 Source-to-Ch 3 − 126 Source-to-Ch 4 − 126 Receiver Ch 1, Dri.
External Trigger Measurement Lower Limit (%) Upper Limit (%) Measured Value (%) Pass/Fail 8 V Pos − 10 10 8 V Neg − 10 10 − 8 V Pos − 10 10 − 8 V Neg − 10 10 Tach Function (option D01 only.
Measurement Lower Limit Upper Limit Measured Value Pass/Fail Ch 2 Current 2.75 mA 5.75 mA mA Ch 3 Current 2.75 mA 5.75 mA mA Ch 4 Current 2.75 mA 5.75 mA mA Source Amplitude Accuracy Measurement Lower Limit (%) Upper Limit (%) Measured Value (%) Pass/Fail 1 kHz, 0.
Source DC Offset Measurement Lower Limit (mVdc) Upper Limit (mVdc) Measured Value (mVdc) Pass/Fail 0 Vdc, 0 Vac(pk) − 15 15 − 10 Vdc, 0 Vac(pk) − 315 315 +10 Vdc, 0 Vac(pk) − 315 315 − 5 Vdc.
Operation Verification Test Record - Two Channel Test Facility ___________________________________________________________ Facility Address ________________________________________________________ Tes.
Self Test Measurement Lower Limit Upper Limit Measured Value Pass/Fail Long Confidence DC Offset Measurement Lower Limit Upper Limit (dBfs) Measured Value (dBfs) Pass/Fail − 51 dBVrms, Ch 1 − 15 .
Spurious Signals Two Ch, 0 Hz Start, Ch 1 − 80 Two Ch, 0 Hz Start, Ch 2 − 80 Two Ch, 200 Hz Start, Ch 1 − 80 Two Ch, 200 Hz Start, Ch 2 − 80 Two Ch, 400 Hz Start, Ch 1 − 80 Two Ch, 400 Hz St.
Two Ch, 14400 Hz Start, Ch 2 − 80 Two Ch, 16000 Hz Start, Ch 1 − 80 Two Ch, 16000 Hz Start, Ch 2 − 80 Two Ch, 17600 Hz Start, Ch 1 − 80 Two Ch, 17600 Hz Start, Ch 2 − 80 Two Ch, 19200 Hz Sta.
Spurious Signals (continued) Two Ch, 32000 Hz Start, Ch 1 − 80 Two Ch, 32000 Hz Start, Ch 2 − 80 Two Ch, 33600 Hz Start, Ch 1 − 80 Two Ch, 33600 Hz Start, Ch 2 − 80 Two Ch, 35200 Hz Start, Ch .
Amplitude Accuracy Measurement Lower Limit (dBVrms) Upper Limit (dBVrms) Measured Value (dBVrms) Pass/Fail − 51 dBVrms, Ch 1 − 51.15 − 50.85 − 51 dBVrms, Ch 2 − 51.15 − 50.85 − 43 dBVrms, Ch 1 − 43.15 − 42.85 − 43 dBVrms, Ch 2 − 43.
Flatness Measurement Lower Limit (dB) Upper Limit (dB) Measured Value (dB) Pass/Fail 27 dBVrms, 99.84 kHz, One Ch, Ch 1 − 0.2 0.2 9 dBVrms, 99.84 kHz, One Ch, Ch 1 − 0.2 0.2 − 11 dBVrms, 99.84 kHz, One Ch, Ch 1 − 0.2 0.2 27 dBVrms, 51.2 kHz, Two Ch, Ch 1 − 0.
Measurement Lower Limit (dB) Upper Limit (dB) Measured Value (dB) Pass/Fail Ch 1, 100 Hz − 0.7 0.7 Ch 2, 100 Hz − 0.7 0.7 Ch 1, 1000 Hz − 0.7 0.7 Ch 2, 1000 Hz − 0.7 0.7 Ch 1, 10000 Hz − 3 2 Ch 2, 10000 Hz − 3 2 Ch 1, 25120 Hz − 4.5 2.4 Ch 2, 25120 Hz − 4.
Frequency Accuracy Measurement Lower Limit (kHz) Upper Limit (kHz) Measured Value (kHz) Pass/Fail 50 kHz 49.9985 50.0015 Single Ch Phase Accuracy Measurement Lower Limit (deg) Upper Limit (deg) Measur.
ICP Supply Measurement Lower Limit Upper Limit Measured Value Pass/Fail Ch 1 Open Circuit Voltage 26 Vdc 32 Vdc Vdc Ch 2 Open Circuit Voltage 26 Vdc 32 Vdc Vdc Ch 1 Current 2.75 mA 5.75 mA mA Ch 2 Current 2.75 mA 5.75 mA mA Source Amplitude Accuracy Measurement Lower Limit (%) Upper Limit (%) Measured Value (%) Pass/Fail 1 kHz, 0.
Operation Verification Test Record - Four Channel Test Facility ___________________________________________________________ Facility Address ________________________________________________________ Te.
Self Test Measurement Lower Limit Upper Limit Measured Value Pass/Fail Long Confidence DC Offset Measurement Lower Limit Upper Limit (dBfs) Measured Value (dBfs) Pass/Fail − 51 dBVrms, Ch 1 − 15 .
Spurious Signals Measurement Lower Limit Upper Limit (dBfs) Measured Value (dBfs) Pass/Fail Four Ch, 0 Hz Start, Ch 1 − 80 Four Ch, 0 Hz Start, Ch 2 − 80 Four Ch, 0 Hz Start, Ch 3 − 80 Four Ch, .
Four Ch, 1600 Hz Start, Ch 1 − 80 Four Ch, 1600 Hz Start, Ch 2 − 80 Four Ch, 1600 Hz Start, Ch 3 − 80 Four Ch, 1600 Hz Start, Ch 4 − 80 Four Ch, 3200 Hz Start, Ch 1 − 80 Four Ch, 3200 Hz Sta.
Four Ch, 14400 Hz Start, Ch 3 − 80 Four Ch, 14400 Hz Start, Ch 4 − 80 Four Ch, 16000 Hz Start, Ch 1 − 80 Four Ch, 16000 Hz Start, Ch 2 − 80 Four Ch, 16000 Hz Start, Ch 3 − 80 Four Ch, 16000 .
Spurious Signals (continued) Four Ch, 20800 Hz Start, Ch 3 − 80 Four Ch, 20800 Hz Start, Ch 4 − 80 Four Ch, 22400 Hz Start, Ch 1 − 80 Four Ch, 22400 Hz Start, Ch 2 − 80 Four Ch, 22400 Hz Start.
Two Ch, 44800 Hz Start, Ch 1 − 80 Two Ch, 44800 Hz Start, Ch 2 − 80 Two Ch, 46400 Hz Start, Ch 1 − 80 Two Ch, 46400 Hz Start, Ch 2 − 80 Two Ch, 48000 Hz Start, Ch 1 − 80 Two Ch, 48000 Hz Sta.
Amplitude Accuracy (continued) Measurement Lower Limit Upper Limit (dBfs) Measured Value (dBfs) Pass/Fail − 35 dBVrms, Ch 2 − 35.15 − 34.85 − 35 dBVrms, Ch 3 − 35.15 − 34.85 − 35 dBVrms, Ch 4 − 35.15 − 34.85 − 27 dBVrms, Ch 1 − 27.
Flatness Measurement Lower Limit (dB) Upper Limit (dB) Measured Value (dB) Pass/Fail 27 dBVrms, 51.2 kHz, One Ch, Ch 1 − 0.2 0.2 9 dBVrms, 51.2 kHz, One Ch, Ch 1 − 0.2 0.2 − 11 dBVrms, 51.2 kHz, One Ch, Ch 1 − 0.2 0.2 27 dBVrms, 51.2 kHz, Two Ch, Ch 1 − 0.
Amplitude Linearity Measurement Lower Limit (dB) Upper Limit (dB) Measured Value (dB) Pass/Fail 13 dBVrms, Ch 1 − 0.0615 0.061 13 dBVrms, Ch 2 − 0.0615 0.061 13 dBVrms, Ch 3 − 0.0615 0.061 13 dBVrms, Ch 4 − 0.0615 0.061 − 1 dBVrms, Ch 1 − 0.
A Weight Filter Measurement Lower Limit (dB) Upper Limit (dB) Measured Value (dB) Pass/Fail Ch 1, 10 Hz − 5 2 Ch 2, 10 Hz − 5 2 Ch 3, 10 Hz − 5 2 Ch 4, 10 Hz − 5 2 Ch 1, 31.62 Hz − 1 1 Ch 2, 31.62 Hz − 1 1 Ch 3, 31.62 Hz − 1 1 Ch 4, 31.62 Hz − 1 1 Ch 1, 100 Hz − 0.
Channel Match Two Ch, 2/1, 7 dBV FS Mag − 0.04 0.04 Two Ch, 2/1, 7 dBV FS Phs − 0.5 0.5 Two Ch, 2/1, − 13 dBV FS Mag − 0.04 0.04 Two Ch, 2/1, − 13 dBV FS Phs − 0.5 0.5 Two Ch, 2/1, − 33 dBV FS Mag − 0.04 0.04 Two Ch, 2/1, − 33 dBV FS Phs − 0.
Four Ch, 4/3, 7 dBV FS Phs − 0.5 0.5 Four Ch, 4/3, − 13 dBV FS Mag − 0.04 0.04 Four Ch, 4/3, − 13 dBV FS Phs − 0.5 0.5 Four Ch, 4/3, − 33 dBV FS Mag − 0.04 0.04 Four Ch, 4/3, − 33 dBV FS Phs − 0.5 0.5 Four Ch, 4/3, 7 dBV − 20 dBfs Mag − 0.
Single Ch Phase Accuracy Measurement Lower Limit (deg) Upper Limit (deg) Measured Value (deg) Pass/Fail Positive slope, Ch 1 − 4 4 Positive slope, Ch 2 − 4 4 Positive slope, Ch 3 − 4 4 Positive .
Source Amplitude Accuracy Measurement Lower Limit (%) Upper Limit (%) Measured Value (%) Pass/Fail 1 kHz, 0.1 Vpk − 4 4 1 kHz, 3.0 Vpk − 4 4 1 kHz, 5.0 Vpk − 4 4 Source Flatness Measurement Lower Limit (dB) Upper Limit (dB) Measured Value (dB) Pass/Fail 12.
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4 Troubleshooting the Analyzer 4-1.
Troubleshooting the Analyzer This chapter contains troubleshooting tests that can isolate most failures to the faulty assembly. The section ‘’How to troubleshoot the analyzer’’ tells you which test to start with based on the failure.
Equipment Required See ‘’Recommended Test Equipment’’ starting on page 1-17 for tables listing recommended equipment. Any equipment which meets the critical specifications given in the tables may be substituted for the recommended model. Troubleshooting Hints • Incorrect bias supply voltages can cause false diagnostic messages.
How to troubleshoot the analyzer • Review ‘’Safety Considerations’’ and ‘’Troubleshooting Hints.’’ Warning Service must be performed by trained service personnel who are aware of the hazards involved (such as fire and electrical shock).
To perform initial verification Use this test to check signals that are vital to the operation of the analyzer. Step 1. Check the power select switch and fuse. • Check that the POWER SELECT switch on the rear of the analyzer is set to the AC position.
Step 4. If the analyzer powers up normally with no error messages (see the following illustration), the screen is continually updating, but the analyzer does not respond to key presses, use the following table to determine the probable faulty assembly.
Step 5. Check the power supply LED and fan. • Set the power switch to off ( O ) and disconnect the power cord from the rear panel. • Remove the cover. See ‘’To remove cover’’ on page 6-6. • Connect the power cord and set the power switch to on ( l ).
Step 6. Check the following TTL clock signals using an oscilloscope and a 1M Ω 10:1 probe. Signal Name Test Location Frequency Probable Faulty Assembly FREQ REF A7 TP1 19.
A7 Component Locator, Circuit Side Agilent 35670A Troubleshooting the Analyzer To perform initial verification 4-9.
Step 7. Check signals required for power up. • Using a logic probe, check the following signals. Signal Name Test Location TTL State Probable Faulty Assembly PVALID A7 P8 pin 3 High A98 Power Supply.
To troubleshoot the power supply Use this test to check the Power Supply and Fan assemblies. This test can also isolate the assembly causing the Power Supply to shut down. Step 1. Check the power supply LED. • Set the power switch to off ( O ). • Disconnect the ribbon cable from the A98 Power Supply assembly.
Step 2. Determine if the Digital, Analog, or Input assemblies are causing the Power Supply assembly to shut down. • Set the power switch to off ( O ). • Pull the following assemblies out of the card nest about 1 inch: A6 Digital A5 Analog A2 Input (optional) A1/A2 Input • Set the power switch to on ( l ).
• Remove the A7 CPU assembly. See ‘’To remove CPU’’ on page 6-11. • Set the power switch to on ( l ). • If the power supply LED is still off, set the power switch to off ( O ), reconnect the CPU assembly, and go to Step 6. Step 5. Repeat the following steps until the assembly causing the Power Supply assembly to shut down is located.
Step 6. Determine if the Motherboard, Fan, or Rear Panel assembly is causing the Power Supply to shut down. • Disconnect the fan cable from A99 P90. • Set the power switch to on ( l ). • If the power supply LED is now on, the A90 Fan assembly is probably faulty.
To troubleshoot power-up failures Use this test when the screen is defective, when the analyzer does not respond correctly to the keyboard, or when it takes more than 3 minutes for the keyboard to become active. Any of the following conditions may cause a power-up failure: • A defective CPU or Memory assembly.
Step 2. Determine if the power-on test passed or failed. • Set the power switch to off ( O ). • Set the power switch to on ( l ) while watching the power-on LEDs. The power-on LEDs are on the A7 CPU assembly and are visible through the rear panel.
Binary (DS5) (DS9) Hexa- decimal ~Time LEDs Visible Description 1111 1111 0000 0000 FF 00 200 ms on 200 ms off A7 flashes LEDs 0000 1000 08 † starting A7 test 0000 0010 02 † A8 RAM DSACK test 0001.
To troubleshoot CPU, memory, and buses failures Use this test to isolate the failure when the power-on LEDs show a fail code or the analyzer locks up during the power-up tests. Step 1. Compare the LED fail code to the following table. • Set the power switch to off ( O ).
Binary (DS5) (DS9) Hexadecimal Probable Faulty Assembly 0000 0100 1111 1111 0001 0011 0000 0001 0001 0111 0001 1000 0000 1001 0000 1011 0001 1010 0001 1001 0000 1000 0001 0010 1010 0000 04 FF 13 01 17 18 09 0B 1A 19 08 12 A0 A7 CPU 0000 0010 0001 1011 0001 0100 0001 0110 0001 1100 02 1B 14 16 1C A8 Memory 0 = LED off 1 = LED on Step 2.
• Disconnect the A7 CPU assembly from the Motherboard, Memory assembly, and cables. • Reconnect the CPU assembly to the Motherboard (do not connect the Memory assembly or cables to the CPU assembly). A7 Component Locator, Circuit Side • Set the power switch to on ( l ) while watching the power-on LEDs.
Step 3. Determine if the Memory or Display assembly is causing the failure. • Set the power switch to off ( O ). • Reconnect the Memory assembly to the CPU assembly. • Set the power switch to on ( l ) while watching the power-on LEDs. The LEDs should sequence through 00 (clear LEDs) with 00 remaining on the LEDs.
To troubleshoot display failures Use this test to isolate display failures to the A101 Display assembly, A102 DC-DC Converter assembly, or A7 CPU assembly. Step 1. Check the DC-DC Converter assembly. • Set the power switch to off ( O ). • Connect the voltmeter to A102 TP1.
Step 2. Check the CPU signals to the Display assembly. • Set the power switch to on ( l ). • Using a logic probe, check that the following TTL signals are toggling.
Step 3. Determine the probable faulty assembly by comparing the analyzer’s symptoms to the following table. Symptom Probable Faulty Assembly Vertical and horizontal scanning is occurring Part of inf.
To troubleshoot IIC bus failures Use this test to isolate IIC (Inter-IC) bus failures to one of the following assemblies: • A7 CPU • A1/A2 Input • A5 Analog • A10 Rear Panel • A11 Keyboard Controller Step 1. Disconnect all assemblies connected to the CPU assembly’s IIC bus.
Step 2. Check the serial clock (SCL). • Attach a logic probe to A7 P7 pin 2 (SCL). • Set the power switch to on ( l ). • Press SW2 (reset switch) while monitoring A7 P7 pin 2 (SCL), the power-on LEDs, and the display. The TTL logic level should toggle when 00 is displayed and toggle continuously when Booting System is displayed.
• If the signal does not toggle after SW2 is pressed, the A7 CPU assembly is probably faulty. • If no error messages are displayed after Booting System or A7 DS101 (green run LED) is off, go to page 4-29, ‘’To troubleshoot fast bus failures.’’ Step 3.
Step 4. Check the assemblies on the IIC bus by repeating the following steps for each assembly. • Set the power switch to off ( O ). • Reconnect one assembly at a time in the following order.
To troubleshoot fast bus failures Use this test to isolate Fast Bus failures to the A7 CPU assembly or A6 Digital assembly. • Set the power switch to off ( O ). • Set the power switch to on ( l ) while holding in the [ System Utility ] key. The screen displays Fast Bus Diagnostic Test .
Troubleshooting the Analyzer Agilent 35670A To troubleshoot fast bus failures 4-30.
To perform self tests Use this test when one of the following occurs: • Performance test fails • Calibration fails • Trigger fails • GPIB fails • Microphone power fails • Serial port fails • Parallel port fails • Failure is intermittent Step 1.
Step 2. Compare the analyzer’s self-test results to the following table. • When the tests have finished, press the following keys: [ Rtn ] [ TEST LOG ] • Press the [ PREVIOUS PAGE ] softkey until the first page of test log is displayed.
Self-Test Troubleshooting Guide Failing Self Test Probable Faulty Assembly Adjustment Troubleshooting Test Interrupt A7 CPU CPU, Memory, and Buses, page 4-18. Mult Fctn Peripheral A7 CPU Front Panel A11 Keyboard Controller GPIB A10 Rear Panel Disk Controller A7 CPU Disk FIFO A7 CPU IIC Bus (If only one assembly is failing) Assembly failing.
Self-Test Troubleshooting Guide (continued) Failing Self Test Probable Faulty Assembly Adjustment Troubleshooting Test Source With LO fails and Source Without LO passes A6 Digital Source Without LO on.
Self-Test Troubleshooting Guide (continued) Failing Self Test Probable Faulty Assembly Adjustment Troubleshooting Test Input A-Wt Filter one channel or channel 1 and 3 or channel 2 and 4 A1/A2 Input I.
Step 3. Determine the probable faulty assembly and next test by comparing the analyzer’s symptoms to the following table. Failure Probable Faulty Assembly Next Test Disk drive A100 Disk Drive Flexib.
To troubleshoot self-test lockup failures Use this test to continue troubleshooting if the analyzer locked up while running the functional test ALL. Step 1. Check the clock signal. • Set the power switch to on ( l ). • Using an oscilloscope an da1M 10:1 probe, check the following signal.
Step 2. Run the IIC and fast bus self tests. • Press the following keys: [ System Utility ] [ CALIBRATN ] [ AUTO CAL OFF ] [ Input ] [ ALL CHANNELS ] [ CH* FIXED RANGE ] 1 [ Vpk ] [ System Utility ].
Step 4. Run the remaining self tests. • Connect the rear panel SOURCE output to the rear panel TACH input using a BNC cable. • Remove all cables from the front panel input connectors. Caution The ICP self test outputs approximately 30 Vdc on the input connectors.
To troubleshoot intermittent failures Use this test to isolate intermittent failures to the assembly. • Determine if your intermittent failure is caused by one of the following common causes.
• Press the following keys: [ Preset ] [ DO PRESET ] [ System Utility ] [ CALIBRATN ] [ AUTO CAL OFF ] [ Input ] [ ALL CHANNELS ] [ CH* FIXED RANGE ] 1 [ Vpk ] [ System Utility ] [ MORE ] [ SELF TES.
To troubleshoot performance test failures With the exception of the Quick Confidence test, all functional self tests must pass before the following table is valid. Step 1. If the analyzer failed a performance test, compare the failing performance test to the following table.
Failing Performance Test Probable Faulty Assembly (in order of probabilty) Adjustment Troubleshooting Test Amplitude linearity one channel A1/A2 Input A5 Analog Input dc offset, page 5-10 ADC gain, of.
Failing Performance Test Troubleshooting Guide Failing Performance Test Probable Faulty Assembly (in order of probabilty) Adjustment Troubleshooting Test Spurious signals one channel A1/A2 Input A5 An.
To troubleshoot source and calibrator failures Use this test to isolate source and calibrator failures to the A6 Digital assembly, the A5 Analog assembly, the A1/A2 Input assembly, the A12 BNC assembly, or the A10 Rear Panel assembly. Step 1. Check the sine wave output.
Step 2. Check the dc offset. • Connect the voltmeter to A5 TP3. • Press the following keys: [ LEVEL ] 0 [ Vpk ] [ DC OFFSET ] • Rotate the RPG knob while monitoring the voltmeter.
Step 3. Check the periodic chirp output. • Press the following keys: [ DC OFFSET ] 0 [ V ] [ LEVEL ] 1 [ Vpk ] [ PERIODIC CHIRP ] • Using an an oscilloscope and a 1:1 probe, check the following signal.
Step 4. Check the calibrator output. • Set the power switch to off ( O ). • Remove the A1/A2 Input assembly and attach a test clip patch cord to TP 17. Connect a 10:1 oscilloscope probe to the patch cord and TP 8 (ground). • Reinstall the Input assembly in the card nest with patch cord and probe attacted.
• Press the following keys: [ System Utility ] [ CALIBRATN ] [ AUTO CAL OFF ] [ Input ] [ ALL CHANNELS ] [ CH* FIXED RANGE ] 1 [ Vpk ] [ Source ] [ SOURCE ON ] [ LEVEL ] 1 [ Vpk ] [ System Utility ].
❑ Step 5. Check the Input assembly. • Using an oscilloscope and a 10:1 probe, check the following signal. Oscilloscope Setup Parameters Waveform Connect CH1 to A1/A2 TP 300 Amplitude Time Distorti.
To troubleshoot input and ADC failures Use this test to isolate input failures in two channel analyzers to the A1 Input assembly, A5 Analog assembly, or A12 BNC assembly.
This is only a quick check of the Input assembly. If the Input assembly’s amplitude is still suspected of failing, set the analyzer to the failing range, impedance, and frequency. Connect a signal equal to the range setting to the failing channel. When the input level equals the range level, A1 P200 (channel 1) or A1 P700 (channel 2) should be 2.
Step 2. Check the dc offset DAC. • Using the BNC-to-SMB cable, connect the oscilloscope to A1 P200 to check channel 1 or to A1 P700 to check channel 2. If you changed the input signal or range, set the input signal to 2 Vp-p and the range to 1 Vpk. • Set the oscilloscope to 700 mV/div.
To troubleshoot input failures on four channel analyzers Use this test to isolate the failure when one channel fails in a four channel analyzer. Step 1.
Step 2. Exchange the Input assemblies. • Set the power switch to off ( O ). • Exchange the Input assembly in the lower slot with the Input assembly in the upper slot. • Reconnect the cables to the A5 Analog assembly. • Set the power switch to on ( l ).
To troubleshoot distortion failures Use this test to isolate distortion failures to the A1/A2 Input assembly, the A5 Analog assembly, or to mechanical failures.
To troubleshoot disk drive failures This test isolates disk drive failures to the A7 CPU, the A100 Disk Drive assembly, or the flexible disk. Step 1. Check the disk controller on the A7 CPU assembly.
Step 3. Check that the Disk Drive assembly can read and write to all sectors of a flexible disk. The read/write self test can take up to 40 minutes to complete if there are no failures.
To troubleshoot auto-range failures Use this test to check the auto-range and overload detector circuits on the A1/A2 Input assembly. This test assumes that calibration and all self tests passed.
• Press the following keys: [ CHANNEL 1 ] [ CHANNEL 1 RANGE ] The range should be set to 5 dBVrms. • Press [ Rtn ]. • Repeat steps 5 and 6 for each channel. • If only one channel, or channel 1 and 3, or channel 2 and 4 are failing, the A1/A2 Input assembly is probably faulty.
To troubleshoot DIN connector failures Use this test to determine if the fuse for the DIN connector is failing before replacing the A10 Rear Panel assembly. • Set the power switch to on ( l ). • Check the voltage on pin 2 of the DIN connector for +5V.
To troubleshoot trigger failures Use this test when the trigger mode is suspected of failing or the Input Trigger self test fails on all channels. Step 1.
• Connect the frequency synthesizer to the analyzer’s rear panel EXT TRIG connector using a BNC cable. • Press the following keys allowing enough time for the analyzer to trigger before pressing the next key.
Step 2. Determine the probable faulty assembly or next step by comparing the trigger failure to the following table. If the trigger failure matches more than one entry in the table, use the entry closest to the beginning of the table.
• If the signal at A5 TP 204 is toggling, the A6 Digital assembly is probably faulty. • If the signal at A5 TP 204 is not toggling, the A5 Analog assembly is probably faulty.
Step 4. Check external trigger signal to the Analog assembly. • Set the power switch to off ( O ). • Remove the seven screws holding the rear panel to the analyzer and lean the rear panel back until the A10 Rear Panel assembly is visible. Keep the cables connected.
To troubleshoot memory battery failures Use this test when battery-backed-up memory is suspected of failing. This test separates Memory assembly failures from memory battery failures.
Troubleshooting the Analyzer Agilent 35670A To troubleshoot memory battery failures 4-68.
To troubleshoot microphone power and adapter failures Use this test to isolate Microphone failures to the A5 Analog assembly or option UK4, Microphone Adapter and Power Supply. Step 1. Check mic pwr on the analyzer’s front panel. • Set the power switch to on ( l ).
To troubleshoot tachometer failures Use this test to isolate tachometer failures to the A10 Rear Panel assembly or A6 Digital assembly. Step 1. Check the rear panel tachometer input.
Step 2. Check the tachometer range function. • Set the oscilloscope for 20 s/div. • Press the following keys: [ Rtn ] [ LOOP MODE OFF ] [ Rtn ] [ SERVICE TESTS ] [ SPCL TEST MODES ] [ SOURCE LEVEL.
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5 Adjusting the Analyzer 5-1.
Adjusting the Analyzer This chapter contains the adjustment procedures for the Agilent 35670A Dynamic Signal Analyzer. Use these adjustments if the analyzer does not meet its specifications or if instructed in chapter 4, ‘’Troubleshooting the Analyzer,’’ or chapter 6, ‘’Replacing Assemblies,’’ to perform these adjustments.
Safety Considerations Although the Agilent 35670A analyzer is designed in accordance with international safety standards, this guide contains information, cautions, and warnings that must be followed to ensure safe operation and to keep the unit in safe condition.
Remote Operation Adjustments can be set up using the remote operation capability of the Agilent 35670A analyzer. The following table lists the adjustments and corresponding GPIB codes. See the Agilent 35670A GPIB Programmer’s Guide for general information on remote operation.
To adjust the frequency reference This procedure adjusts the 19.923 MHz (or, to be exact, 19.922944 MHz) frequency reference circuit on the A7 CPU assembly. This circuit is the source of the timing reference for the A1/A2 Input and A5 Analog assemblies.
To adjust the source This procedure adjusts the source dc offset on the A5 Analog assembly. Equipment Required: Multimeter BNC-to-Dual Banana Cable • Connect the multimeter to the analyzer’s rear-panel SOURCE connector.
To adjust the ADC gain, offset and reference This procedure adjusts the second-pass gain, the first-pass offset, and the reference voltage for the ADC on the A5 Analog assembly. This prevents nonlinear Analog-to-Digital Converter (ADC) operation near the Digital-to-Analog Converter (DAC) transition levels.
• Set the oscilloscope as follows: Channel 1 Volts/Div Offset Coupling 20 mV/div 0V 1M Ω ac Channel 2 Volts/Div Offset Coupling 500 mV/div 0V 1M Ω ac Time Base Time/Div Sweep 1.0 ms/div Triggered Trigger Source Level Slope Mode Channel 2 500 mV Positive Edge Display Mode Averaging No.
• Press the following keys: [ System Utility ] [ MORE ] [ SERVICE TESTS ] [ ADJUSTMTS ] [ ADC ADJUSTMNT ] [ OFFSET ] Wait for the analyzer to set up the adjustment. The analyzer is ready when the adjustment message appears on the screen. • If the oscilloscope display looks like the following figure, go to step 17.
To adjust the input dc offset This procedure minimizes the residual dc response of the A1/A2 Input assemblies. The standard two channel analyzer has one A1 Input assembly.
For the standard two channel analyzer, do the following to adjust input dc offset: • Set the power switch to on ( I ). • Press the following keys: [ System Utility ] [ MORE ] [ SERVICE TESTS ] [ ADJUSTMTS ] [ CHANNEL 1 ADJUSTMNT ] [ OFFSET ] Wait for the analyzer to set up the adjustment.
For the optional four channel analyzer, do the following to adjust input dc offset: • Set the power switch to on ( I ). • Press the following keys: [ System Utility ] [ MORE ] [ SERVICE TESTS ] [ ADJUSTMTS ] [ CHANNEL 1 ADJUSTMNT ] [ OFFSET ] Wait for the analyzer to set up the adjustment.
To adjust common mode rejection This procedure optimizes the common mode rejection of the A1/A2 Input assemblies. The standard two channel analyzer has one A1 Input assembly.
For the standard two channel analyzer, do the following to adjust common mode rejection: • Set the power switch to off ( O ). • Connect the BNC(f)-to-minigrabber adapter to the BNC cable. Connect both minigrabber clips (signal and ground) to A5 TP8 and the BNC connector to the analyzer’s CH 1 connector.
For the optional four channel analyzer, do the following to adjust common mode rejection: • Set the power switch to off ( O ). • Connect the BNC(f)-to-minigrabber adapter to the BNC cable. Connect both minigrabber clips (signal and ground) to A5 TP8 and the BNC connector to the analyzer’s CH 1 connector.
• While monitoring the Y: value, adjust A2 R543 in the lower slot for a minimum marker value. • Disconnect the BNC cable from the analyzer’s CH 3 connector and connect to the CH 4 connector. • Press the the following keys: [ Rtn ] [ CHANNEL 4 ADJUSTMNT ] [ CMRR ] Wait for the analyzer to set up the adjustment.
To adjust filter flatness This procedure adjusts the anti-alias filter on the A1/A2 Input assemblies. The standard two channel analyzer has one A1 Input assembly.
For the standard two channel analyzer, do the following to adjust filter flatness: • Set the power switch to on ( I ). • Press the following keys: [ System Utility ] [ MORE ] [ SERVICE TESTS ] [ ADJUSTMTS ] [ CHANNEL 1 ADJUSTMNT ] [ 50 kHz ] Wait for the analyzer to set up the adjustment.
For the optional four channel analyzer, do the following to adjust filter flatness: • Set the power switch to on ( I ). • Press the following keys: [ System Utility ] [ MORE ] [ SERVICE TESTS ] [ ADJUSTMTS ] [ CHANNEL 1 ADJUSTMNT ] [ 25 kHz ] Wait for the analyzer to set up the adjustment.
• Press the following keys: [ Rtn ] [ CHANNEL 3 ADJUSTMNT ] [ 25 kHz FLATNESS ] Wait for the analyzer to set up the adjustment. The analyzer is ready when the adjustment message appears on the screen. • While monitoring the Yr: value, adjust A2 R615 in the lower slot for a marker value of 0 0.
To adjust the display voltage This procedure adjusts the A102 DC-DC Converter assembly’s display voltage to match the voltage required by the A101 Display assembly. This adjustment is only required when the DC-DC Converter assembly or the Display assembly is replaced.
Adjusting the Analyzer Agilent 35670A To adjust the display voltage 5-22.
6 Replacing Assemblies 6-1.
Replacing Assemblies This chapter tells you what to do before and after you replace an assembly and shows you how to disassemble the analyzer. Warning Disconnect the power cord from the rear panel before disassembly or assembly of the Agilent 35670A.
What to do before replacing the CPU assembly The analyzer’s serial number and firmware options are stored in EEPROM (U27) on the A7 CPU assembly. Before replacing the CPU assembly, remove A7 U27 from the faulty assembly and insert into the new assembly.
What to do after replacing an assembly • Reinstall all assemblies and cables that were removed during troubleshooting. • Do the required adjustments listed in the following table. • Do the self test, page 4-31. • Do the required performance tests listed in the following table.
Assembly Replaced Required Adjustment Required Performance Test A7 CPU Frequency reference, page 5-5 Frequency accuracy A8 Memory A9 NVRAM A10 Rear Panel Tach function (option 1D0 only) External trigg.
To remove cover 1 Place the analyzer on its front panel. Using a 4 mm hex driver, loosen the four corner screws. 2 Slide the cover straight up. Replacing Assemblies Agilent 35670A To remove cover 6-6.
To remove rear panel 1 Remove cover (see ‘’To remove cover’’). 2 Using a T-15 torx driver, remove the seven screws from the rear panel. Pull the rear panel straight off. 3 Disconnect the ribbon cable and the coaxial cable from the A10 Rear Panel assembly.
To remove front panel 1 Remove cover (see ‘’To remove cover’’). 2 Remove assembly retainer bracket. 3 Slide A5 Analog assembly part way out and disconnect gray mic cable. 4 Using a T-15 torx driver, remove the two screws on each side of the front panel.
5 Pull the top of the front panel out of the frame. 6 Disconnect the ribbon cables from the front panel. Disconnect the coaxial cables connected to the A12/A22 BNC assembly.
To remove disk drive 1 Remove cover (see ‘’To remove cover’’). 2 Disconnect the disk drive cable. 3 Using a T-10 torx driver, loosen the three screws at the back of the disk drive bracket.
To remove CPU 1 Remove cover (see ‘’To remove cover’’). 2 Using a T-10 torx driver, remove the nine screws from the A7 CPU assembly. Lift the assembly up, unpluging the A7 CPU assembly from the A8 Memory assembly and A99 Motherboard. 3 Disconnect the ribbon cables from the A7 CPU assembly.
To remove NVRAM 1 Remove A7 CPU assembly (see ‘’To remove CPU’’). 2 Using a T-10 torx driver, remove the four screws from the A9 NVRAM assembly.
To remove memory 1 Remove A7 CPU assembly (see ‘’To remove CPU’’). Remove optional A9 NVRAM assembly (see ‘’To remove NVRAM’’). 2 Using a T-10 torx driver, remove the eight screws from the A8 Memory assembly.
To remove power supply 1 Remove rear panel (see ‘’To remove rear panel’’). 2 Disconnect the ribbon cable from the A98 Power Supply assembly. 3 Using a T-15 torx driver, remove the six screws from the A98 Power Supply assembly. 4 Set the front panel power switch in the off ( O ) position (switch in the out position).
5 Using a straight-edge screw driver, hold the power switch rod in position and lift the A98 Power Supply to disengage it from the power switch rod. 6 Lift the A98 Power Supply assembly straight up.
To remove motherboard 1 Remove A98 Power Supply assembly (see ‘’To remove power supply’’). Remove A7 CPU assembly (see ‘’To remove CPU’’). 2 Disconnect the fan cable from the A99 Motherboard. 3 Remove assembly retainer bracket. 4 Unplug all assemblies from the A99 Motherboard.
5 Using a 5 mm open-ended wrench, remove the two screws from the EXT MONITOR connector. 6 Using T-10 torx driver, remove the twelve screws in A99 Motherboard.
To remove dc-dc converter 1 Remove front panel (see ‘’To remove front panel’’). Remove A7 CPU assembly (see ‘’To remove CPU’’). 2 Using a T-10 torx driver, remove the five screws from the front wall. 3 Using a T-10 torx driver, remove the four screws from the shield.
7 Replaceable Parts 7-1.
Replaceable Parts This chapter contains information for ordering replacement parts for the Agilent 35670A Dynamic Signal Analyzer. Ordering Information Replacement parts are listed in the following te.
Direct Mail Order System Within the U.S.A., Agilent Technologies can supply parts through a direct mail order system. Advantages of the Direct Mail Order System are: • Direct ordering and shipment from the Agilent Parts Center. • No maximum or minimum on any mail order.
Assemblies After replacing an assembly, see ‘’What to do after replacing an assembly’’ in chapter 6 for required adjustments and performance tests. The reference designator for the screws that fasten the A90 Fan assembly is MP600. The reference designator for the screws that fasten the A98 Power Supply assembly is MP603.
Ref Des Agilent Part Number CD Qty Description Mfr Code Mfr Part Number A1 35670-69501 9 1 INPUT ASSEMBLY - 2 CHANNEL 28480 35670-69501 A2 35670-69502 0 2 INPUT ASSEMBLY - 4 CHANNEL 28480 35670-69502 .
Cables Ref Des Agilent Part Number CD Qty Description Mfr Code Mfr Part Number W1 03585-61603 5 2 CBL-ASM CXL FSMB/FSMB 100MM OR 28480 03585-61603 W2 03585-61604 6 3 CBL-ASM CXL FSMB/FSMB 177MM YL 284.
Instrument Covers and Handles Ref Des Agilent Part Number CD Qty Description Mfr Code Mfr Part Number MP1 35670-64101 5 1 SHTF ASSY-COVER ALV 28480 35670-64101 MP2 5021-5483 4 2 COVER LATCHES 28480 50.
Assembly Covers and Brackets Ref Des Agilent Part Number CD Qty Description Mfr Code Mfr Part Number MP100 35670-00605 0 1 SHTF SHIELD DISP PWR SUPPLY 28480 35670-00605 MP101 35670-01203 6 1 SHTF BRKT.
Front Panel Parts The reference designator for the screws that fasten the bezel (MP208) to the front frame (MP201) is MP604. The reference designator for the nuts that fasten the A101 Display assembly to the front frame is MP611. The reference designator for the screws that fasten the front frame to the chassis is MP603.
Rear Panel Parts The reference designator for the screws that fasten the KEYBOARD connector and A10 Rear Panel assembly to the rear panel is MP601. The reference designator for the screws that fasten the rear panel to the chassis is MP603. Caution The POWER SELECT switch must be in the DC position (out position) when the key cap (MP315) is removed.
Chassis Parts Ref Des Agilent Part Number CD Qty Description Mfr Code Mfr Part Number MP400 35670-00101 1 1 SHTF-CHASSIS ASSY 28480 35670-00101 MP401 35670-00102 2 1 SHTF WALL ASSY FRONT 28480 35670-0.
Screws, Washers, and Nuts Ref Des Agilent Part Number CD Qty Description Mfr Code Mfr Part Number MP600 0515-0374 4 16 SCREW-MACHINE ASSEMPLY M3 X 0.5 10MM-LG 28480 0515-0374 MP601 0515-0430 3 66 SCREW-MACHINE ASSEMPLY M3 X 0.5 6MM-LG 28480 0515-0430 MP602 0515-1940 2 4 SCR-MCH M2.
Option UK4 Parts Agilent 35670A Replaceable Parts Option UK4 Parts 7-13.
Ref Des Agilent Part Number CD Qty Description Mfr Code Mfr Part Number A77 35670-66577 3 1 MICROPHONE PC ASSEMBLY 28480 35670-66577 A77P2 1252-5280 4 4 CONN-LEMO 7-CNT FEMALE RT - PC 00268 EPG.1B.307.HL N A77P10 1252-1481 9 1 CON-RECT D-SUB 15CKT 15PN THL 00779 748876-1 A77SW 1 3101-3124 4 4 SW -SL .
8 Circuit Descriptions 8-1.
Circuit Descriptions This chapter contains the overall instrument description and individual assembly descriptions for the Agilent 35670A Dynamic Signal Analyzer. The overall instrument description lists the assemblies in the analyzer and describes the analyzer’s overall block diagrams.
Overall Block Diagram The following figures show the overall block diagrams for both the two channel and the four channel analyzer. Each block in the diagrams represents a functional block in the analyzer. The assembly that performs the function is listed in the block.
Secondary Keypad Consists of hardkeys and softkeys. Power Supply Supplies the dc voltages shown in the block diagram. See “Power Supply Voltage Distribution” in chapter 9 for additional information. Rear Panel Provides the interface for devices connected to its GPIB connector, parallel connector, serial connector, and DIN keyboard connector.
Four Channel Overall Block Diagram Agilent 35670A Circuit Descriptions Overall Instrument Description 8-5.
A1 Input The A1 Input assembly is the input assembly for the two channel analyzer. The A1 Input assembly conditions the channel 1 and channel 2 input signals before they are sent to the analog-to-digital converter on the A5 Analog assembly.
DC Offset DAC Compensates for any dc offset added to the input signal due to circuitry in the signal path. The required dc offset is calculated during the analyzer’s calibration routine and is added to the input signal in 0.
A1 Input Block Diagram: Channel 1 Circuit Descriptions Agilent 35670A A1 Input 8-8.
A1 Input Block Diagram: Channel 1 (continued) Agilent 35670A Circuit Descriptions A1 Input 8-9.
A1 Input Block Diagram: Channel 2 Circuit Descriptions Agilent 35670A A1 Input 8-10.
A1 Input Block Diagram: Channel 2 (continued) Agilent 35670A Circuit Descriptions A1 Input 8-11.
A2 Input The A2 Input assembly is the input assembly for the four channel analyzer. The four channel analyzer contains two A2 Input assemblies. The A2 Input assembly connected to J1 on the Motherboard conditions the channel 1 and channel 3 input signals before they are sent to the analog-to-digital converter on the A5 Analog assembly.
DC Offset DAC Compensates for any dc offset added to the input signal due to circuitry in the signal path. The required dc offset is calculated during the analyzer’s calibration routine and is added to the input signal in 0.
A2 Input Block Diagram: Channel 1 or Channel 2 Circuit Descriptions Agilent 35670A A2 Input 8-14.
A2 Input Block Diagram: Channel 1 or Channel 2 (continued) Agilent 35670A Circuit Descriptions A2 Input 8-15.
A2 Input Block Diagram: Channel 3 or Channel 4 Circuit Descriptions Agilent 35670A A2 Input 8-16.
A2 Input Block Diagram: Channel 3 or Channel 4 (continued) Agilent 35670A Circuit Descriptions A2 Input 8-17.
A5 Analog The A5 Analog assembly converts the analog input from the A1 Input assembly or A2 Input assemblies to 16-bit serial, digital data. The Analog assembly also converts digital data from the A6 Digital assembly to the analog source output.
A5 Analog Block Diagram: ADC and Trigger Agilent 35670A Circuit Descriptions A5 Analog 8-19.
ADC Input Switch Connects the first pass signal to the low pass filter on the first pass. On the second pass, the ADC Input Switch connects the second pass signal to the low pass filter. After the second pass, the ADC Input Switch connects a 0.34 Vdc signal to the low pass filter to reset the 8-Bit ADC.
A5 Analog Block Diagram: Analog Source and Calibrator Agilent 35670A Circuit Descriptions A5 Analog 8-21.
A6 Digital The A6 Digital assembly prepares the digital input data for the A7 CPU assembly. The Digital assembly also generates the digital source data for the A5 Analog assembly. The Digital assembly receives the input signals as 16-bit serial, digital data from the Analog assembly.
A6 Digital Block Diagram Agilent 35670A Circuit Descriptions A6 Digital 8-23.
FIFO Controller Gathers the data from the Filter Latches when the selected trigger occurs and places the data into FIFO RAM. After a time record is collected, this circuit controls data flow from FIFO RAM to the CPU. FIFO RAM Stores data from the Digital Filter.
A7 CPU The A7 CPU assembly controls the entire analyzer. It performs multiple tasks, such as: • Initiating the power-up sequence and calibration routines • Capturing front panel keystrokes • Con.
A7 CPU Block Diagram Circuit Descriptions Agilent 35670A A7 CPU 8-26.
A7 CPU Block Diagram: Interface Reset Logic Puts the analyzer into a known state. A reset occurs at power-up and power-down (PVALID from the A98 Power Supply assembly goes high), when the reset switch S2 (located on the CPU assembly) is pressed, or when a RESET instruction is executed.
PVALID from the power supply goes high when +5 volts reaches a valid level. The Reset Generator produces a 128 ms reset pulse when PVALID goes high and S2 is open, or when S2 is closed then opened and PVALID is high. At the end of the reset pulse, RSTn goes high, which terminates the reset and allows all circuits to begin operation.
All of these assemblies appear as slaves to the IIC Controller. The IIC Controller has access to EEPROM, which allows the CPU assembly to store information such as the analyzer’s serial number.
A8 Memory The A8 Memory assembly provides the A7 CPU assembly with ROM, dynamic RAM (DRAM), static RAM (SRAM), and a real-time clock. Memory Controller Provides the interface between the A7 CPU assembly and the Memory assembly for data transfer. FLASH ROM, DRAM, and SRAM Stores data in 32-bit words.
ROM Address Latch,DRAM Address MUX and Buffer Buffer the processor address bus. DRAM Data Buffer Buffers the data on the Processor Data Bus and the Buffered Processor Data Bus. FLASH Program Control Allows the FLASH ROM to be reprogrammed. RAM Battery Power Provides battery backup for SRAM and the Battery Backed Real Time Clock.
A9 NVRAM The optional A9 NVRAM assembly provides the A7 CPU assembly with additional nonvolatile RAM. Address Latch Holds the address from the processor address bus. This circuit latches the address when an address strobe occurs (BBASn goes low). Data Buffer Buffers the processor data bus.
A10 Rear Panel The A10 Rear Panel assembly contains the BNC connectors for the external trigger input, tachometer input, and source output. The Rear Panel assembly also contains DIN, GPIB, serial, and parallel interface connectors. In addition, the Rear Panel assembly provides the fan control for the A90 Fan assembly.
A10 Rear Panel Block Diagram Circuit Descriptions Agilent 35670A A10 Rear Panel 8-34.
A11 Keyboard Controller The A11 Keyboard Controller assembly together with the A13 Primary and A14 Secondary Keypad assemblies make up the front panel keyboard. This assembly provides the interface between the A7 CPU assembly and the keypads. Beeper Generates a tone when instructed by the A7 CPU assembly.
A12 BNC The A12 BNC assembly connects the BNC connectors on the two channel analyzer’s front panel to their respective assembly. The Source BNC is connected to the A5 Analog assembly and the Channel 1 and Channel 2 BNCs are connected to the A1 Input assembly.
A13 Primary Keypad The A13 Primary Keypad assembly contains the marker, display, numeric, and measurement keys for the two channel analyzer. The Primary Keypad assembly also contains the RPG and the LEDs that indicate a half range or overload condition on a channel.
A90 Fan The A90 Fan assembly cools the analyzer. The A10 Rear Panel assembly controls the speed of the Fan assembly. As the temperature increases, the Rear Panel assembly increases the fan speed. As the temperature decreases, the Rear Panel assembly decreases the fan speed.
A99 Motherboard The A99 Motherboard assembly provides a common point of contact for voltage and signal distribution. The Motherboard also buffers the external monitor signals and routes the buffered signals to the EXT MONITOR connector.
Option UK4 Microphone Adapter and Power Supply The optional Microphone Adapter and Power Supply provides four LEMO connectors with power for microphones. The input signal from each LEMO connector is routed to a BNC connector. BNC cables then connect the input signals to the analyzer’s input channels.
Option UK4 Microphone Adapter and Power Supply Block Diagram Agilent 35670A Circuit Descriptions Option UK4 Microphone Adapter and Power Supply 8-41.
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9 Voltages and Signals 9-1.
Voltages and Signals This chapter shows where the signals and voltages are used in the analyzer and describes each signal. The signals are described in groups as shown in the following table.
Assembly Locations and Connections Assembly Locations Agilent 35670A Voltages and Signals Assembly Locations and Connections 9-3.
Assembly Connections for Two Channel Analyzer Voltages and Signals Agilent 35670A Assembly Locations and Connections 9-4.
Assembly Connections for Four Channel Analyzer Agilent 35670A Voltages and Signals Assembly Locations and Connections 9-5.
Power Supply Voltage Distribution The following table shows the power supply voltages used by each assembly in the analyzer. In addition, the table also shows the path taken by these voltages. Some assemblies use the power supply voltages as supplied by the Power Supply assembly.
A1 Input Analyzers with only two channels contain one A1 Input assembly. The A1 Input assembly conditions both input signals. After the signals are conditioned by the Input assembly they are routed through SMB cables to the A5 Analog assembly. The signal from A1 P200 to A5 P4 is C1AAFO (Channel 1 Anti-Alias Filter Out).
A8 Memory The following table lists signals routed between the A8 Memory assembly and the A7 CPU assembly. This table shows several things — if the assembly generates or uses the signal or voltage, and if a signal is bidirectional. A description of each signal follows the table.
Signal Name A7 J3 Pin(s) A8 P1 Pin(s) A7 J3 A8 P1 PA7 4Bjio B29 S • PA8 5C C28 S • PA9 5B B28 S • PA10 6C C27 S • PA11 6B B27 S • PA12 8C C25 S • PA13 8B B25 S • PA14 9C C24 S • PA15 9.
Gnd 1A, 2A, 7A, 7B, 7C, 8A, 14A, 14B, 14C, 21A, 24A, 24B, 24C, 25A, 30A, 31C C2, A3, A8, A9, B9, C9, A12, A19, B19, C19, A25, A26, B26, C26, A31, A32 •• Not Used 32B B1 — — S This assembly is the source of the signal. • This assembly uses the signal ⇔ This signal is bidirectional.
SIZE0 — SIZE1 Data Size — These lines determine the size of the operand. When SIZE0 is high and SIZE1 is low, the operand size is 8 bits. When SIZE0 is low and SIZE1 is high, the operand size is 16 bits. When both SIZE0 and SIZE1 are high, the operand size is 24 bits.
A9 NVRAM The following table lists signals routed between the optional A9 NVRAM assembly and the A8 Memory assembly. This table shows several things — if the assembly generates or uses the signal or voltage, and if a signal is bidirectional. A description of each signal follows the table.
Signal Name Pin(s) A8 P2 A9 J1 PROTCTn A9 S • PA18 C16 S • PA19 A4 S • PA20 A12 S • PA21 B16 S • PRW A3 • • VBATT A13, A14, A15 S • +5 A10, A11, B11, C11 • • Gnd A1, A5, B5, C5, A7, A8 •• S This assembly is the source of the signal.
A10 Rear Panel This section describes the signals at the A10 Rear Panel assembly’s interface connectors and input connectors. The signals are described in the following order: GPIB Serial Port Parallel Port DIN Keyboard Source Output Tachometer Input External Trigger Input GPIB The following table lists signals at the GPIB connector (A10 J102).
DIO1 — DIO8 Data Input/Output — These are inverted data lines that conform to IEEE specification IEEE-488. When ATN is low, these lines contain interface commands. When ATN is high, these lines contain data. EOIn End or Identify — If ATN is high, a low on this line marks the end of a message block.
Parallel Port The Parallel Port is a 25-pin, Centronics port. The Parallel Port can interface with printers or plotters. The following table lists signals at the Parallel Port connector (A10 J100).
DIN Keyboard The following table lists signals at the DIN keyboard connector (A10 P200). A description of each signal follows the table. Signal Name Pin KEYCLK 1 KEYDAT 3 +5 V 4 Logic Gnd 2 Not Used 5 KEYCLK Key Board Clock — This clock synchronizes the transfer of keyboard data from the external keyboard to the A10 Rear Panel assembly.
A11 Keyboard Controller The following table lists signals routed between the A11 Keyboard Controller assembly and the A7 CPU assembly. This table shows several things — if the assembly generates or uses the signal or voltage, and if a signal is bidirectional.
SCL Serial Clock — This is the serial clock for the keyboard IIC bus. The IIC controller on the A7 CPU assembly generates this clock to synchronize the transfer of data from the A11 Keyboard Controller assembly. SDA Serial Data — This is the keyboard IIC bus.
A12 BNC The A12 BNC assembly is only used in two channel analyzers. The A12 BNC assembly routes the signals connected to the Channel 1 BNC connector and Channel 2 BNC connector to the A1 Input assembly. The A12 BNC assembly also routes the source signal from the A5 Analog assembly to the Source BNC connector.
A13 Primary Keypad The following table lists signals routed between the A11 Keyboard Controller assembly and the A13 Primary Keypad assembly. This table shows several things — if the assembly generates or uses the signal. A description of each signal follows the table.
Half Range A — In both the two channel and four channel analyzer, a low on this line turns on the channel 1 half range LED. This line goes low when the A1 or A2 Input assembly detects that the amplitude of the channel 1 input signal reached half the set range.
A14 Secondary Keypad The following table lists signals routed between the A11 Keyboard Controller assembly and the A14 Secondary Keypad assembly. This table shows several things — if the assembly generates or uses the signal. A description of each signal follows the table.
A22 BNC The A22 BNC assembly is only used in four-channel analyzers. The A22 BNC assembly routes the signals connected to the Channel 1 BNC connector and Channel 3 BNC connector to the A2 Input assembly connected to J1 on the Motherboard.
A99 Motherboard The following table lists all signals routed through the Motherboard. The table uses bold face type to show which assembly can generate the signal.
Signal Name Assembly Using Signal A1/A2 A2 A5 A6 A7 A10 A90 A98 Ext Mon Motherboard Connector J1 J2 J5 J6 J7 P10 P90 P98 P95 Connector Pin Number FD1 25C 126 FD2 26B 77 FD3 26C 127 FD4 27B 78 FD5 27C .
Signal Name Assembly Using Signal A1/A2 A2 A5 A6 A7 A10 A90 A98 Ext Mon Motherboard Connector J1 J2 J5 J6 J7 P10 P90 P98 P95 Connector Pin Number MDACCSn 8B 8A PFWn 16A 101 29 PREFS B16 B16 23C 23A PV.
The following table lists all voltages routed through the Motherboard (see ‘’Power Supply Voltage Distribution’’ earlier in this chapter for a complete list of assemblies using each voltage).
A10MHZ 10 MHz Clock — This is a 50% duty cycle, 10 MHz clock. This clock provides the timing for the IIC processor on the A10 Rear Panel assembly. ADCOLn ADC Overload — This line goes low when the input to the A5 Analog assembly’s ADC exceeds its positive limit.
EXTRGIN External Trigger In — This is a buffered version of the A10 Rear Panel assembly’s external trigger input. FA1 — FA5 Fast Bus Address Lines — These lines are a buffered form of the A7 CPU assembly’s microprocessor address bus. The CPU assembly uses these lines to address different circuits on the A6 Digital assembly.
FSELAn Fast Bus Asynchronous Select — This line is low when an asynchronous fast bus cycle is in operation. FSELSn Fast Bus Synchronous Select — This line is low when a synchronous fast bus cycle is in operation.
LPFCLK Low Pass Filter Clock — This is a control line from the A6 Digital assembly’s digital source. This line controls the cut-off frequency of the A5 Analog assembly’s programmable low pass filter. MDACCSn Source Attenuation DAC Chip Select — This is a control line from the A6 Digital assembly’s digital source.
SRCCLOCK Source Clock — This clock provides the timing for data transfer to the A5 Analog assembly’s serial-in parallel-out shift register. This clock is generated by the A6 Digital assembly’s digital source. SRCDATA Source Data — This is the data line for the A5 Analog assembly’s serial-in parallel-out shift register.
A100 Disk Drive The following table lists signals routed between the A100 Disk Drive assembly and the A7 CPU assembly. This table shows several things — if the assembly generates or uses the signal or voltage, and if a signal is bidirectional. A description of each signal follows the table.
DIR Direction — This line sets the direction for the disk head. A high on this line sets the direction away from the spindle. A low on this line sets the direction toward the spindle. DISKINn Disk In — This line goes low when a flexible disk is inserted in the A100 Disk Drive assembly.
A101 Display The following table lists signals routed between the A102 DC-DC Converter assembly and the A101 Display assembly. This table shows several things — if the assembly generates or uses the signal or voltage, and if a signal is bidirectional.
A102 DC-DC Converter The following table lists signals routed between the A7 CPU assembly and the A102 DC-DC Converter assembly. This table shows several things — if the assembly generates or uses the signal or voltage, and if a signal is bidirectional.
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10 Internal Test Descriptions 10-1.
Internal Test Descriptions This chapter describes the power-on test, calibration routine, fault log messages, and self tests. This chapter also contains a list of the GPIB commands for each self test. Power-on Test Description The power-on test is run when the analyzer is powered up.
Power-on Test Messages The ‘’Power-on Test Messages’’ table provides additional information for interpreting the power-on test LEDs. Using the ‘’Binary to Hexadecimal’’ table, translat.
Power-on Test Messages Hexadecimal Code Message Assembly/Sub-block Undefined Initial power-on XXX FF* CPU flashes LEDs 0 XXX 04 LED DSACK failure 0 XXX 13 CPU failure 0 XXX 01 Coprocessor DSACK failur.
Calibration Routine Description The calibration routine consists of a dc-offset calibration and a frequency calibration. The calibration routine occurs immediately following the power-on tests and periodically afterwards to compensate for any drift.
DC-Offset Tables and Frequency Correction Curves The dc-offset calibration builds 5 dc-offset tables — one for each anti-alias filter and one for each channel when the anti-alias filters are bypassed. The values in the dc-offset tables are sent to the channel dc-offset DACs to compensate for dc offsets introduced by analog input circuits.
Calibration Error Messages The dc-offset tables and frequency correction curves produced by the calibration routine are compared with a set of maximum allowable error curves. The Quick Confidence self test runs the calibration routine and places error messages in the Test Log if any measurement exceeds the maximum allowable error.
[ Inst Mode ] [ 2 CHANNEL ] [ Input ] [ CHANNEL 1 RANGE ] 1 [ dBVrms ] [ CHANNEL 2 RANGE ] 1 [ dBVrms ] [ Disp Format ] [ UPPER/LOWER ] [ System Utility ] [ CALBRATIN ] [ SAVE CH1 CAL TRACE ] [ INTO D.
Fault Log Messages 0 Unknown Fault This error message occurs when the fault could not be determined. 1 I2C: Timeout This error message occurs if the A7 CPU assembly’s IIC controller takes too long to tell the MPU that it is ready for a new command.
Self-Test Descriptions Thirty-seven self tests are available that can be run in groups or individually. The following table lists the group of self tests that are run when you select [ FUNCTIONL TESTS ], [ ALL ]. This group does not include any of the self tests that require a formatted flexible disk.
Functional Tests All Self-Test Group Softkey Self Test Name Assembly A7 A8 A6 A12/ A22 A1 A2 A5 A10 A11 A100 [ INTERRUPT ] Interrupt X0 [ MULTI FCTN PERIPHERL ] † Multi Fctn Peripheral X0 [ FRONT PA.
Self Tests that Perform a Measurement The following self tests perform measurements: Self Test Front Panel Softkey Baseband [ BASEBAND ] Zoom [ ZOOM ] Source thru DSP [ DGTL SRCE THRU DSP ] ADC gate a.
Individual Self-Test Descriptions [ AAF BYPASS ] This test verifies that the anti-alias filters and the bypass circuits on the A1 Input assembly or A2 Input assemblies are operating correctly. In this test, the A5 Analog assembly’s source outputs a signal that is connected to the input channels via the calibration path (CALP).
[ DISTORTN ] This test checks for noise and distortion in the input circuits of the A1 Input assembly or A2 Input assemblies. In this test, the A5 Analog assembly’s source outputs a signal that is connected to the input channels via the calibration path (CALP).
[ INPUT TRIGGER ] This test checks the trigger-level circuits on the A5 Analog assembly for both positive and negative slope triggering. In this test, the A5 Analog assembly’s source outputs a 512 Hz, 5 Vpk signal that is connected to the input channels via the calibration path (CALP).
[ OFFSET ] This test verifies that the analyzer can correct for dc offsets generated by the input circuits on the A1 Input assembly or A2 Input assemblies.
[ SERIAL PORT ] This test verifies that the RS-232 interface on the A7 CPU assembly is capable of sending and receiving data. In this test, the user connects the transmit data line to the recieve data line. Data is sent out on the transmit data line and read back on the receive data line.
Self-Test Menu Map and GPIB Commands The analyzer’s self tests can be run from the front panel or by a controller via GPIB. To run a test from the front panel, press [ System Utility ] followed by the appropriate softkey in the table. To run a test via GPIB, send the equivalent GPIB command (to abort a test, send TEST:ABOR).
Self Test GPIB Command [ SELF TEST ] – [ FUNCTIONL TESTS ] – [ DIGITAL PROCESSOR ] – [ TRIGGER ] TEST:DSP:TRIG; *WAI [ LO ] TEST:DSP:LO; *WAI [ DIGITAL FILTER ] TEST:DSP:FILT; *WAI [ FIFO ] TEST.
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11 Backdating 11-1.
Backdating This chapter provides information necessary to modify this manual for instruments that differ from those currently being produced. The information in this chapter documents earlier instrument configurations and associated servicing procedures.
12 Quick Reference 12-1.
Quick Reference This chapter shows assembly locations, cable connections, and all the block diagrams for the Agilent 35670A Dynamic Signal Analyzer. All block diagrams, except the overall block diagrams, show the connector numbers for signals routed through RF cables.
Assembly Locations Agilent 35670A Quick Reference 12-3.
Assembly Connections for Two Channel Analyzer Quick Reference Agilent 35670A 12-4.
Assembly Connections for Four Channel Analyzer Agilent 35670A Quick Reference 12-5.
Two Channel Overall Block Diagram Quick Reference Agilent 35670A 12-6.
Four Channel Overall Block Diagram Agilent 35670A Quick Reference 12-7.
A1 Input Block Diagram: Channel 1 Quick Reference Agilent 35670A 12-8.
A1 Input Block Diagram: Channel 1 (continued) Agilent 35670A Quick Reference 12-9.
A1 Input Block Diagram: Channel 2 Quick Reference Agilent 35670A 12-10.
A1 Input Block Diagram: Channel 2 (continued) Agilent 35670A Quick Reference 12-11.
A2 Input Block Diagram: Channel 1 or Channel 3 Quick Reference Agilent 35670A 12-12.
A2 Input Block Diagram: Channel 1 or Channel 3 (continued) Agilent 35670A Quick Reference 12-13.
A2 Input Block Diagram: Channel 2 or Channel 4 Quick Reference Agilent 35670A 12-14.
A2 Input Block Diagram: Channel 2 or Channel 4 (continued) Agilent 35670A Quick Reference 12-15.
A5 Analog Block Diagram: ADC and Trigger Quick Reference Agilent 35670A 12-16.
A5 Analog Block Diagram: Analog Source and Calibrator Agilent 35670A Quick Reference 12-17.
A6 Digital Block Diagram Quick Reference Agilent 35670A 12-18.
A7 CPU Block Diagram Agilent 35670A Quick Reference 12-19.
A7 CPU Block Diagram: Interface Quick Reference Agilent 35670A 12-20.
Reset Logic Agilent 35670A Quick Reference 12-21 121.
A8 Memory Block Diagram Quick Reference Agilent 35670A 12-22.
A9 NVRAM Block Diagram Agilent 35670A Quick Reference 12-23.
A10 Rear Panel Block Diagram Quick Reference Agilent 35670A 12-24.
A11 Keyboard Controller Block Diagram Agilent 35670A Quick Reference 12-25.
A98 Power Supply Block Diagram Option UK4 Microphone Adapter and Power Supply Block Diagram Quick Reference Agilent 35670A 12-26.
Index A A-weight filter test 3-20 ac power cables 2-4 consumption 2-2 select switch 2-5 accessories vi ADC adjustments 5-7 circuit description 8-18 gate array self-test 10-13 adjustments GPIB commands.
front panel 8-3, 8-36 - 8-37 rear panel 8-33 cooling 2-7 cover part numbers 7-7 removing 6-6 CPU assembly before replacing 6-3 circuit description 8-3, 8-25 frequency adjustment 5-5 part number 7-5 re.
part number 7-5 fast bus interface 8-28 self-test description 10-14 troubleshooting 4-29 fault log messages 10-9 FIFO gate array self test 10-14 flatness adjustment 5-17 test 3-18 frequency accuracy t.
M measurement uncertainty 3-4, 3-56 memory assembly circuit description 8-3, 8-30 part number 7-5 removing 6-13 signal descriptions 9-8, 9-12 troubleshooting 4-18 troubleshooting battery 4-67 micropho.
Q quick confidence self test 10-16 R random seek self test 10-16 read self test 10-16 read/write self test 10-16 rear panel iv connectors 8-33 part numbers 7-10 removing 6-7 rear panel assembly circui.
hints 4-3 using self tests 4-31 V voltages power supply distribution 9-6 W washers, part numbers 7-12 with LO self test 10-17 without LO self test 10-17 Z zoom self test 10-17 6.
Guide to Agilent 35670A Documentation If you are thinking about... And you want to... Then read... ♦ Unpacking and installing the Agilent 35670A Install the Agilent 35670A Dynamic Signal Analyzer Ag.
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About this edition October 2000: Rebranded for Agilent Technologies February 1995: In Replaceable Parts , page 7-5, three corrections were made to the replaceable parts list.
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