Benutzeranleitung / Produktwartung CDCM7005 des Produzenten Texas Instruments
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CDCM7005 ( QFN P ackage) Evaluation M odule M anual HP A/High S peed Communications 2005 Clock Drivers User ’ s G uide SCAU015.
IMPORT ANT NOTICE T exas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice.
EVM IMPORT ANT NOTICE T exas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EV ALUA TION PURPOSES ONL Y and is not considered by TI to be fit for commercial use.
EVM W ARNINGS AND RESTRICTIONS It is important to operate this EVM within the supply voltage range of 3 V and 3.6 V . Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM.
Related Documentation From T exas Instruments iii Preface Read This First About This Manual This manual explains how to use the CDCM7005 evaluation module (EVM) and provides guidelines to build the customer ’s own systems. The manual includes schematics, layout, bill of materials, and a software description.
Contents v Contents 1 Introduction 1-1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1 CDCM7005 Functional Block Diagram 1-2 . . . . . . . . . . . . . . . . .
Contents vi Figures 3 − 1 Board View 3-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 − 1 Screen View 4-2 . . . . . . . . . . . . . . . . . . . . . . . . . .
1-1 Introduction Introduction The CDCM7005 is a high-performance, low phase noise and low skew clock synchronizer that synchronizes an on-board voltage controlled crystal oscillator (VC(X)O) frequency to an external reference clock. The device operates up to 2.
CDCM7005 Functional Block Diagram 1-2 1.1 CDCM7005 Functional Block Diagram PECL to L VCMOS Progr . Delay N PECL INPUT CTRL_LE CTRL_DA T A CTRL_CLK VCXO_IN CP_OUT PLL_LOCK ST A TUS_REF / PRI_SEC_CLK B.
2-1 Quick Start Quick Start In order to setup the EVM quickly and to take some measurements at default settings, the following actions are required: - Supply 3.3 V to P1, LED D4 will be on. - Apply a single-ended reference clock to the reference clock input PRI_REF (pin A1) or SEC_REF (pin B1).
3-1 EVM Hardware EVM Hardware This chapter discusses the EVM hardware. T opic Page 3.1 Board View and Connector Location 3-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2 Hardware Configuration 3-2 . . . . . . . . . . . . . . . . . . . .
Board View and Connector Location 3-2 3.1 Board View and Connector Location Figure 3 − 1. Board View 3.2 Hardware Configuration This section describes the board configuration using on-board jumpers and solder bridges. 3.2.1 Power Supply (P1, P2) - Supply 3.
Hardware Configuration 3-3 EVM Hardware 3.2.3 Programming Interfaces (J30, J31) The SPI of the device is used for writing to the control register of the device. It consists of three control lines CTRL_CLK, CTRL_DA T A, and CTRL_LE. There are four 30-bit wide RAM registers, which can be addressed by the two LSBs of a transferred word.
Hardware Configuration 3-4 When the CDCM7005 is powered up, it defaults to five L VPECL outputs. However , this EVM is configured as follows: - Y0 − Y2 = L VPECL - Y3, Y4 = L VCMOS (in addition Y4 has an option for a custom filter) The reference input clock signal has to be applied to J1 or J6.
4-1 Serial Peripheral Interface (SPI) Software Serial Peripheral Interface (SPI) Software This chapter discusses the serial peripheral interface software. T opic Page 4.1 Functional Description 4-2 . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional Description 4-2 4.1 Functional Description Programming software here as described is intended for programming the in- ternal control register of the CDCM7005. The software runs under Win- dows98, N T , 2000, and XP . A quick installation is required prior to use.
5-1 Application Circuit Diagram Application Circuit Diagram This chapter discusses the application circuit diagram. T opic Page 5.1 Application Circuit Diagram 5-2 .
Application Circuit Diagram 5-2 5.1 Application Circuit Diagram The following applications sections the two loop filter configurations are discussed. 5.1.1 Passive Loop Filter The passive loop filter is a second order filter (two poles, one zero). The zero is required for the overall loop stability .
Application Circuit Diagram 5-3 Application Circuit Diagram 5.1.2 External Active Loop Filter Using OP A341 Figure 5 − 2. CDCM7005 With a External Active Loop Filter Using OP A341 SPI PECL_OUT_B PEC.
6-1 Parts List, Board Layout, and Schematics Parts List, Board Layout, and Schematics This chapter contains the parts list, board layout, and schematics for the CDCM7005 EVM. T opic Page 6.1 Parts List 6-2 . . . . . . . . . . . . . . . . . . . . . . .
Parts List 6-2 6.1 Parts List Item QTY Reference Designator Footprint Part Part Number 1 24 C1 − C9, C12, C13, C15, C17, C26, C40, C41, C46, C47, C53, C54, C56 − C58, C66 smd_cap_0402 10 nF Panaso.
Parts List 6-3 Parts List, Board Layout, and Schematics Item QTY Reference Designator Footprint Part Part Number 22 2 C74 smd_cap_1210 10 µ F Murata GRM32DR61E106KA12L C77 smd_cap_1210 10 µ F Murata.
Parts List 6-4 Item QTY Reference Designator Footprint Part Part Number 48 7 R4, R6, R13, R15, R62, R63, R65 smd_res_0402 100 Ω Panasonic ERJ − 2RKF1000X 49 6 R5, R8, R14, R17, R21, R23 smd_res_04.
Parts List 6-5 Parts List, Board Layout, and Schematics 6.2 Board Layout Figure 6 − 1. Component View and Silkscreen (T op View).
Parts List 6-6 Figure 6 − 2. Component View and Silkscreen (Bottom V iew).
Parts List 6-7 Parts List, Board Layout, and Schematics Figure 6 − 3. T op Layer View.
Parts List 6-8 Figure 6 − 4. Bottom Layer View.
Parts List 6-9 Parts List, Board Layout, and Schematics Figure 6 − 5. Ground Plane View.
Parts List 6-10 Figure 6 − 6. Power Layer View 6.3 Schematics The following pages contain the schematics for the CDCM7005 (QFN package)..
Parts List 6-1 1 Parts List, Board Layout, and Schematics 5 5 4 4 3 3 2 2 1 1 D D C C B B A A PWR_IN VCC GND AVCC GND GND AVCC GND GND VCC GND VCC_CP Title Size Document Number R e v D a te: Sheet of CDCM7005EVM_QFN − SCH A CDCM7005_QFN Evaluation Module B 45 Tuesday, April 26, 2005 C63 100P 1 2 C53 10n 1 2 C66 10n 1 2 C38 100n 1 2 C59 2.
Parts List 6-12 5 5 4 4 3 3 2 2 1 1 D D C C B B A A REF_SEL PLLLOCK PLL_LOCK STAT_VCXO/I _REF_CP STAT_VCXO RESET RST PWRDWN PW R_ DW N GND VCC_CP AVCC AVCC VCC GND GND GND GND GND GND GND GND GND GND .
Parts List 6-13 Parts List, Board Layout, and Schematics 5 5 4 4 3 3 2 2 1 1 D D C C B B A A V_CTRL GND GND VCC GND GND GND VCC GND GND V_CTRL CP_OUT Title Size Document Number R e v D a te: Sheet of .
Parts List 6-14 5 5 4 4 3 3 2 2 1 1 D D C C B B A A Y3_SMA Y4B_SMA PRI_REFC LK PRI_CLK_SENSE OUTB OUT VCXO_IN_EXT V_CTRL VCXO_INB_EXT Y1_SMA Y1B_SMA SEC_ REFCLK VCXO_IN_SMA VCXO_INB_SMA Y0_SMA Y0B_SMA.
Parts List 6-15 Parts List, Board Layout, and Schematics 5 5 4 4 3 3 2 2 1 1 D D C C B B A A CLK DA T A SPI_DATA SPI_CLK SPI_LE LE GND GND GND VCC GND GND GND VCC GND VCC VCC CTRL_LE CTRL_DATA CTRL_CL.
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