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Intel ® IQ803 32 I/O Process or Eva lua ti on P la tfo rm B oard M an u al Sept ember 2004 Docume nt Number : 274069- 001US.
2 Septem ber , 2004 Docum ent Nu m ber: 2 74069-001 U S In te l ® IQ80332 I/O Proc essor Eval uation P latfo rm B oard M an ual INFORMA TION IN THIS DO CUMENT IS PROV IDED IN CONNECTION WIT H INTEL® PRODUCTS.
Documen t Number: 274069-0 01US September , 2004 3 In te l ® IQ80332 I/O Proc essor Eval uation Pl atform B oard M anual Contents Content s 1 I ntr odu cti on ..... ..... .... ..... ... .... ..... ..... .... ..... ... .... ..... ..... ..... .... ... .
4 Septem ber, 2004 Do cument Nu m ber: 274069- 001US In te l ® IQ80332 I/O Proc essor Eval uation P latfo rm B oard M an ual Contents 3.7.1 C onso le Ser ial Port....... .. ..... ..... ..... .... ... ..... .... ..... ..... .... ... ..... .... ..... .
Documen t Number: 274069-0 01US September , 2004 5 In te l ® IQ80332 I/O Proc essor Eval uation Pl atform B oard M anual Contents B Get ting S tar ted an d De bugg er ..... .. ..... ..... .... ..... ..... .. ..... ..... .... ..... ..... .. ..... ....
6 Septem ber, 2004 Do cument Nu m ber: 274069- 001US In te l ® IQ80332 I/O Proc essor Eval uation P latfo rm B oard M an ual Contents Fig ur es 1I n t e l ® 80332 I/O Processor Block Diagram ...................... .... ..... .. ..... . ........... .
Documen t Number: 274069-0 01US September , 2004 7 In te l ® IQ80332 I/O Proc essor Eval uation Pl atform B oard M anual Contents Examples 1I n t e l ® 8033 2 I /O Proc essor R elated Docume ntation Li st........................... .. .......... . .
8 Septem ber, 2004 Do cument Nu m ber: 274069- 001US In te l ® IQ80332 I/O Proc essor Eval uation P latfo rm B oard M an ual Contents Revision History Date Revision Description 27 S ept ember 2004 001 In iti al Re leas e.
Evaluat ion Platf orm Board Manual 9 Introduction 1 1.1 Docum ent Pu rpose and Scop e Th is do cum en t des cr ibe s th e In te l ® I Q8 03 32 I/O pr oce ss or e valu ation plat fo rm bo ard (I Q8033 2) usin g D DR-I I 4 00 MH z SD RA M. The I ntel ® 8033 2 I/ O pr o ce sso r ( 8 03 32) is int end ed for r api d, intellig ent I /O devel opm e nt.
10 Evaluat ion Plat form Board Manu al In te l ® IQ80332 I/O Proc essor Intr oduc ti on 1.3 Electronic In formation 1. 4 Component Referen ces Ta b l e 3 pr ovi des add itio nal in formati on o n th e major comp on ents of 80 332 .
Evaluat ion Platf orm Board Manual 11 Inte l ® IQ80332 I/O Processo r Int roduc tion 1.5 T erms a nd Def init ions T a bl e 4 . T er m s a nd Def ini tio ns Ac rony m/T erm D efinit ion ARM Re fers t o bot h the micr opro cesso r ar chitec tur e and t he com pan y that lice nses i t.
12 Evaluat ion Plat form Board Manu al In te l ® IQ80332 I/O Proc essor Intr oduc ti on 1.6 I ntel ® 803 32 I /O Pro cessor About the 8 0332. T h e 80332 is a mult i-f unct ion dev ice that com bi nes the Int e l XSca le ® cor e wi th intelligen t per ipherals , and integ rat es two PCI Expr ess -to-PCI Bridges .
Evaluat ion Platf orm Board Manual 13 Inte l ® IQ80332 I/O Processo r Int roduc tion Fi gur e 1 . In tel ® 80332 I/O P rocesso r B lock Diag ram.
14 Evaluat ion Plat form Board Manu al In te l ® IQ80332 I/O Proc essor Intr oduc ti on 1.7 I ntel ® IQ80332 I/O Processor Evaluatio n Plat form Board Features T ab le 5. Summary of Fea tures Featur e Def init ion B attery Bac kup Uni t: B attery bac k up circ uit f or SDRAM.
Evaluat ion Platf orm Board Manual 15 Getting S tarted 2 The 803 32 i s a softw are devel opme nt en vironm ent fo r IQ8 0332. S o ftware u pda tes and addition al offe rin gs fr om ve ndo rs can c han ge fr equ entl y . T o ke ep up -to-da t e, plea se vis it http:// ww w .
16 Evaluat ion Plat form Board Manu al In te l ® IQ80332 I/O Proc essor Getting Started 2. 2.2 P ower Re quir ement s The 8 033 2 r equi res a 3.3 V s u ppl y co ming t hro ug h th e PC I Ex pr ess p rim ar y co nne ctor . P lu g th e boar d i nto a deskto p w ith a PC I Ex pre ss s lot .
Evaluat ion Platf orm Board Manual 17 Inte l ® IQ80332 I/O Processo r Ge tting Started 2.3 Facto ry Setti ngs Make s ure that the s witch/ jump er settin gs are se t to prop er pos itions as exp laine d in Sec tio n 3 .9, “Switche s and Jumper s” on page 38 .
18 Evaluat ion Plat form Board Manu al In te l ® IQ80332 I/O Proc essor Getting Started 2. 5 T ar get M onitor s 2.5. 1 RedHat Red Bo ot RedB oo t* is an ac ronym f or “ Red Hat Em bedd ed D ebu g .
Evaluat ion Platf orm Board Manual 19 Inte l ® IQ80332 I/O Processo r Ge tting Started 2.6 Host Com munications Examp les How to comm unicate to the hos t. 2.6.1 Serial-UART Co mm unicati on Using a ser ial connec tion to comm unicate w ith the bo ard ( Figur e 2 ).
20 Evaluat ion Plat form Board Manu al In te l ® IQ80332 I/O Proc essor Getting Started 2.6.3 Net work Co mmuni cat io n Using a standa rd network connectio n, the us er can communi cate with the board via the ether net port.
Evaluat ion Platf orm Board Manual 21 Inte l ® IQ80332 I/O Processo r Ge tting Started 2.6.4 GNUPr o GDB/ Insight 2.6. 4.1 Com municati ng with RedBo ot Har dwa re Set u p: • Host wit h UNI X /Li n.
22 Evaluat ion Plat form Board Manu al In te l ® IQ80332 I/O Proc essor Getting Started T o brin g up a Hy per T ermi nal s ess ion on a Win32 p latfo rm : G o to Sta rt, Prog ram s, Ac ces sori es, Co mmun ic ati o ns , Hy per T ermi nal • Hyper T e r mina l setup screen s: — “Conn ecti on Descri ption” P anel: • Ent er name.
Evaluat ion Platf orm Board Manual 23 Inte l ® IQ80332 I/O Processo r Ge tting Started 2.6. 4.2 Con nectin g with G DB Below are the GDB c om mands entered f rom the co mmand p rompt. B e sure sy stem path is set to access “xscale- elf-gdb.ex e”.
24 Evaluat ion Plat form Board Manu al In te l ® IQ80332 I/O Proc essor Getting Started This Page Le f t Int en tion ally Blank.
Evaluat ion Platf orm Board Manual 25 Inte l ® IQ80332 I/O Processo r Har dware R ef erence S ec tion Hardware Refere nce Sec t ion 3 3.1 Functional Di agram Figure 5 sho ws the fun ctio nal b lock fo r the 803 32 .
26 Evaluat ion Plat form Board Manu al In te l ® IQ80332 I/O Proc essor Hardware Refer ence S ection 3.2 Board Form-Factor/ Connectivity Ta b l e 6 s ummari zes the form- factor and co nnectiv ity features for the 80 332.
Evaluat ion Platf orm Board Manual 27 3.3 Power The 80 332 draw s pow er from th e PCI Expre ss bus. Th e pow er requir ements for the 8 0332 are shown in Ta b l e 7 belo w . The numbers do not inclu de the po wer requir ed by a PCI -X card m ounted on the exp ansio n s lot .
28 Evaluat ion Plat form Board Manu al In te l ® IQ80332 I/O Proc essor Hardware Refer ence S ection 3.4 Memory Subs ystem The Memory C ontroll er of 80332 contr ols the D DR S DRAM memory s ubsyst em. It features pro- gr ammabl e chip select s and support for error co rrection codes (ECC ).
Evaluat ion Platf orm Board Manual 29 Inte l ® IQ80332 I/O Processo r Har dware R ef erence S ec tion 3.4.2 Flas h Mem or y Requ irem ents T ot al Flash m emory size i s 8 MB.
30 Evaluat ion Plat form Board Manu al In te l ® IQ80332 I/O Proc essor Hardware Refer ence S ection 3. 5 Inte rrupt Rout ing The 80 33 2 Interr upt ro utin g.
Evaluat ion Platf orm Board Manual 31 Inte l ® IQ80332 I/O Processo r Har dware R ef erence S ec tion 3.6 Intel ® IQ80332 I/O Processor Evaluation Plat form Board Peri pheral Bus The 8 03 32 p op ulate s the per iphe ral bus as de picte d by Figure 7 .
32 Evaluat ion Plat form Board Manu al In te l ® IQ80332 I/O Proc essor Hardware Refer ence S ection 3.6.1 Flash RO M T able 1 1. Flash ROM Features Description Flas h i s an In tel S trat aFl ash ®.
Evaluat ion Platf orm Board Manual 33 Inte l ® IQ80332 I/O Processo r Har dware R ef erence S ec tion 3.6.2 UART The 8 03 32 has tw o in tegr ated U A R Ts .
34 Evaluat ion Plat form Board Manu al In te l ® IQ80332 I/O Proc essor Hardware Refer ence S ection 3.6. 7 Battery St a tus A CPL D on th e I Q8033 2 provi de s the foll owin g st atus for the b att ery . Please see Sec ti o n 4.2 .2 , “P e rip h era l Bus Memory Ma p” on page 47 for mor e deta ils on a ddr essi ng t he CP LD .
Evaluat ion Platf orm Board Manual 35 Inte l ® IQ80332 I/O Processo r Har dware R ef erence S ec tion 3.7 Debug Interface 3.7 .1 C onso le S eri al P ort The p la tfor m has tw o s eria l po rts fo r de bu g pu rpos es as d esc ribe d in Se ct ion 3 .
36 Evaluat ion Plat form Board Manu al In te l ® IQ80332 I/O Proc essor Hardware Refer ence S ection 3.7 .2 JT AG De bu g The 8 0332 h as a 20 -pin J T AG co nn ector (J7D 2 ) that is in comp liant wi th ARM M ulti-IC E gu idel ines . 3. 7.2.1 JT AG Port Figu re 9.
Evaluat ion Platf orm Board Manual 37 Inte l ® IQ80332 I/O Processo r Har dware R ef erence S ec tion 3.8 Board Reset Scheme Figure 10 dep icts the r eset s chem e f or the 8 0332. Ta b l e 1 4 li st the r ese t schem es fo r the 80 332 . T a ble 1 4.
38 Evaluati on Platform Board Manu al In te l ® IQ80332 I/O Proc essor Hardware Refer ence S ection 3.9 Switches and Jumpers 3. 9.1 Swit ch Summary Please note th at th e term ‘open’ r efers to the in div idu al pin o f sw itch S7A 1 being pu shed in at bo ttom (small do t on p in away fr om the ‘ open’ lab el on th e switch ).
Evaluati on Pl atform Boar d Man ual 39 Inte l ® IQ80332 I/O Processo r Har dware R ef erence S ec tion 3.9. 3 Jumper Su mmary 3.9 .4 Con nect or Su mmary 3.9 .5 G ener al Pur pose I npu t/ Outp ut He ader The foll ow ing table in Secti on 19, “J 2 D2 GP IO Hea der De finiti on” on page 39 show s the G P IO signal ass ignments.
40 Evaluati on Platform Board Manu al In te l ® IQ80332 I/O Proc essor Hardware Refer ence S ection 3. 9.6 De t ail Desc ript ions of Swi tch es/ Jumpe rs 3. 9.6.1 Swit ch S1C2: 80332 Rese t This s wi tch re sets 803 32. 3. 9.6.2 Swit ch S6A1: BPCI-X Reset This swi tch r esets the PCI -X B s egmen t bu s.
Evaluati on Pl atform Boar d Man ual 41 Inte l ® IQ80332 I/O Processo r Har dware R ef erence S ec tion 3.9.6.4.3 S 7A1-3: Configration Cycle Enable corr espondin g to si g nal name PBI_AD 6 Conf igu.
42 Evaluati on Platform Board Manu al In te l ® IQ80332 I/O Proc essor Hardware Refer ence S ection 3.9.6.4.7 Switch S7 A1 - 7: S MBUS Manageability Add ress Bit 0 co r respon ding to signal name PBI_AD17 This allo ws 8 033 2 to addres s S MBus Slave A dd ress bit 0 (PBI _A17 ).
Evaluati on Pl atform Boar d Man ual 43 Inte l ® IQ80332 I/O Processo r Har dware R ef erence S ec tion 3.9. 6.5 Jump er J7D1: Flash b it-wid th The Intel ® IQ80332 I/O processor evaluatio n platform b oard expects an 8-bit F lash enable. 3.9. 6.6 Jumper J1C1: JT AG Chain 3.
44 Evaluati on Platform Board Manu al In te l ® IQ80332 I/O Proc essor Hardware Refer ence S ection 3. 9.6.8 Jum per J7B4 : SMBus Head er 3. 9.6.9 Jum per J9D3: B uzzer V olume C ontrol T able 37. Jump er J7B4: Descriptions Ju mp er D es crip t ion F ac t ory D ef au lt J7B 4 S MBu s He ad er 1-2, 3 -4 T ab le 38.
Evaluati on Pl atform Boar d Man ual 45 Inte l ® IQ80332 I/O Processo r Software R eference Softwa r e Refe rence 4 4.1 DRAM For DD R SD RAM S izes an d Configu rations, s ee the Int el ® 80332 I/O Pr ocessor Devel oper ’ s Ma nua l . Th i s section also con tain s multip le exam ples of Ad dr ess Regis ter Pr ogram min g.
46 Evaluati on Platform Board Manu al In te l ® IQ80332 I/O Proc essor Software Refer ence 4.2.1 Flash RO M The Flash R OM is an 8 MB Intel StrataF lash ® (part # 28F6 40 ) that sits on the Per iphe ral B us and is accessed using PCE0 .
Evaluati on Pl atform Boar d Man ual 47 Inte l ® IQ80332 I/O Processo r Software R eference 4. 2.2 Perip hera l Bu s Me mor y Map The Ta b l e 4 1 i s the ph ys ical m e mory m ap o f th e dev ices on t he 8033 2 P eri pher al Bu s: T able 41 .
48 Evaluati on Platform Board Manu al In te l ® IQ80332 I/O Proc essor Software Refer ence 4.3 Board Sup port Package (BSP ) Examples Examples provided in this secti on are based on the R edH at* RedBo ot softw are runnin g on th e IQ80 332 .
Evaluati on Pl atform Boar d Man ual 49 Inte l ® IQ80332 I/O Processo r Software R eference 4. 3.2 RedBo ot * In tel ® 8 033 2 I /O Pr oces so r Mem ory Ma p 4. 3.3 RedBo ot Inte l ® 8033 2 I/O P roc esso r Fi les Attache d in the k it, find a co py of the Re dH at eCos for IQ80 332 CD.
50 Evaluati on Platform Board Manu al In te l ® IQ80332 I/O Proc essor Software Refer ence 4.3.4 RedBoot 8033 2 DDR Mem ory Initi alizati on Sequence In order to set the correct ECC bits, a DDR memo ry system (DIM M or discre te comp onents) mu st be written to with a kn own value.
Evaluati on Pl atform Boar d Man ual 51 Inte l ® IQ80332 I/O Processo r IQ8 0321 and IQ80332 Comparison s IQ803 21 and IQ 80332 Compari sons A This appe ndix provi des a brief descript ion for dif ferenc es between IQ80332 a nd I Q 80321.
52 Evaluati on Platform Board Manu al In te l ® IQ80332 I/O Proc essor IQ80321 and IQ80332 Co m pariso ns This Page Le f t Int en tion ally Blank.
Evaluati on Pl atform Boar d Man ual 53 Inte l ® IQ80332 I/O Processo r Gettin g Sta rte d and De bu gge r Getting S tarted and Debugger B B.1 Int roduc tion Thi s appe nd ix pe rtain s to Cod e| Lab v ers ion 2.3 an d later whi ch use s Micr oso ft's V isual Stu dio .
54 Evaluati on Platform Board Manu al In te l ® IQ80332 I/O Proc essor Getti ng Starte d a nd D ebu gg er B.1. 4 Rela te d We b S ite s • Ma craig or: ht tp://www .ocde mon.n et / • http :// develope r .int el.c om/desi gn/inte lxscal e/dev_too ls/02 1022/inde x.
Evaluati on Pl atform Boar d Man ual 55 Inte l ® IQ80332 I/O Processo r Gettin g Sta rte d and De bu gge r B.2 Setup B. 2.1 Har dwar e Se tup Us e Figure 14 and th e rest of the Int el ® 80 332 I/O Proces sor E valu atio n Pla tfor m B oard Manu al , to set up the h ardwar e.
56 Evaluati on Platform Board Manu al In te l ® IQ80332 I/O Proc essor Getti ng Starte d a nd D ebu gg er B.2. 2 Softwar e S e tup A TI Code | La b is a plu g-in to Mic rosoft V is ual S t ud io .NET , t herefor e Micros oft V isu a l S tudio .NET m ust alr eady be loaded on t he syste m.
Evaluati on Pl atform Boar d Man ual 57 Inte l ® IQ80332 I/O Processo r Gettin g Sta rte d and De bu gge r B.3 New P roject Setup B. 3.1 Cre ati ng a N ew Proj ect 1. Launch Code |Lab EDE for .NET . 2. On th e St art P a ge , se l ec t “N e w P roj ec t” .
58 Evaluati on Platform Board Manu al In te l ® IQ80332 I/O Proc essor Getti ng Starte d a nd D ebu gg er B.3. 2 C on fi gu ra ti on Examine the mai n menu of Cod e|Lab EDE f or .NET . Since Code|Lab is a plug- in to V isual Studio, some o f these menu item s are V isual Studio and som e are specific t o Code|Lab .
Evaluati on Pl atform Boar d Man ual 59 Inte l ® IQ80332 I/O Processo r Gettin g Sta rte d and De bu gge r B.4 Fl ashing wit h JT AG B. 4.1 O verv iew Code|L ab and Rav en are capa ble of readin g from, wr itin g to, and erasing the co n tents of the Flash on the evalu atio n board.
60 Evaluati on Platform Board Manu al In te l ® IQ80332 I/O Proc essor Getti ng Starte d a nd D ebu gg er B.4. 2 Usin g Fl ash Pr og ram m er Note: T he para lle l port must be se t to EPP mod e or the Macraig or Raven does not work proper ly . Down load the R edB oot executable f iles f rom t he follo win g locatio n: http :// develope r .
Evaluati on Pl atform Boar d Man ual 61 Inte l ® IQ80332 I/O Processo r Gettin g Sta rte d and De bu gge r B.5 Debug gi ng Out of Flas h JT AG deb uggers can be u sed on two leve ls; with or witho ut the s ource code.
62 Evaluati on Platform Board Manu al In te l ® IQ80332 I/O Proc essor Getti ng Starte d a nd D ebu gg er B.7 Ru nning the Code|La b Debugger This s ectio n is pr ovi ded t o get t he syste m up and run nin g in the Code |Lab Deb ug envi ron me nt, b ut it is not inten ded as a ful l-function al tutorial.
Evaluati on Pl atform Boar d Man ual 63 Inte l ® IQ80332 I/O Processo r Gettin g Sta rte d and De bu gge r B.7 . 3 Dis pl a yi ng So ur ce Co de 1. Launch the Code |Lab EDE Debugger and open the “T ester1L ED” ELF pro gram. Note: Use the F il e/ R ec en t P ro g ra m s m e n u fo r q uic k ac ce s s.
64 Evaluati on Platform Board Manu al In te l ® IQ80332 I/O Proc essor Getti ng Starte d a nd D ebu gg er B. 7.5 S te ppin g Throu gh the Co de The “led.c” file con tains a fun ction that is called f rom cod e in “blin k.c”. This exerc ise steps thr ough the code an d utilizes a f ew of the m ost com mon step tools.
Evaluati on Pl atform Boar d Man ual 65 B.8 Ex ploring the Code| Lab Debug Wi ndows This secti on discusses som e basics o f the debug en vironment. S ome of th ese windo ws and co ncepts hav e bee n de a lt with dur ing pr evio us ex erc ises in thi s man ual .
66 Evaluati on Platform Board Manu al In te l ® IQ80332 I/O Proc essor Getti ng Starte d a nd D ebu gg er B.8. 6 Reg ist ers Win dow Close all the ac tive w indow s, then br ing up t he Regis ters win dow . R es ize the this w indow and its colum ns to g et a go od view of all the reg isters.
Evaluati on Pl atform Boar d Man ual 67 B.9 Debug gi ng B asi cs B. 9.1 O verv iew De bugge rs allow de velo per s to int e rroga t e app licatio n co de by a llowi ng p ro gra m flow c ontr ol, d ata obs ervation , and data ma nipu latio n.
68 Evaluati on Platform Board Manu al In te l ® IQ80332 I/O Proc essor Getti ng Starte d a nd D ebu gg er B.9.3 C.9. 3 E xcep ti ons/T rappin g A debug exceptio n causes the processor to re-dir ect execution to a d ebug event handl ing routine.
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