Benutzeranleitung / Produktwartung IQ80321 des Produzenten Intel
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Intel ® IQ803 21 I/O Proce ss o r Evaluation Platform Bo ar d Ma nu al April 2 , 2003 Docume nt Number : 273521- 008.
2 Board Man ual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm INFORMA TION IN THIS DOCUME NT IS PROVIDED IN CONNECTION WITH INT EL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, B Y ESTO PPE L O R O THERW ISE , TO ANY INT ELL ECT UAL PR OPE RTY R IG HT S I S GR ANT ED BY TH IS DO CUM ENT .
Board Manu al 3 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm Contents Content s 1 I ntr odu c tio n ..... ..... .. ..... .. ..... .. ..... .. ..... .. ..... ... .... ... .... ... ..... .. ..... .. ..... .. ..... .. ..... .. ..... .. ..... .
4 Board Man ual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Contents 3.7.4 R ota ry Swit ch.. .. ..... .. ..... .. ..... ... .... ... .... ... ..... .. ..... .. ..... .. ..... .. ..... .. ..... .. ..... .. ..... ... .... ... . 42 3.7.5 Battery Sta tus .
Board Manu al 5 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm Contents 3.10 .9. 20 Jumper J 3E1 ..... ..... .. ..... .. ..... ... .... ... .... ... .... ... ..... .. ..... .. ..... .. ..... .. ..... .. ..... .. 66 3.10 .9. 21 Jumper J 3G1 ..
6 Board Man ual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Contents B.7. 6 S et ting Code|Lab Debu g Options ................................ ............................... .. ......... 99 B.8 Explo ring the Code|Lab D ebug Wind ows .. .
Board Manu al 7 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm Contents C.9 D ebugg ing Bas ics .. ................. ..................... .. ............... .......................... ..................... .. .. .1 1 9 C.9. 1 Overv iew .... .
8 Board Man ual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Contents Fig ur es 1I n t e l ® 80321 I/O Processor Block Diagram ...................... ..................... ..................... ................ 16 2 Seri al- UART Communi cati on .
Board Manu al 9 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm Contents Tabl es 1I n t e l ® 8032 1 I /O Proc essor R elated Docume ntation Li st........................... ....... ....... ............ ....... 13 2 Electron ic I nfor mation .
10 Board Man ual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Contents 50 Switch S8E1 - 3: Sett ings a nd Opera ti on Mode ... .. ... .. ... .. .. ... .. ..... .. ..... .. ..... .. ..... .. ..... .. ..... ... .... ... . 60 51 Switch S8E1 - 4: Descri ptio ns .
Board Manu al 11 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm Contents Revision Histo ry Date Revision Description Apri l 20 03 008 Cha ng ed n ame an d r efe r e nces o f T este r1L ED to T est er3 21 LE D . M ar ch 2003 007 Re vise d Appe n dix B , “Ge tt ing Starte d an d De bu gg e r” .
12 Board Man ual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Contents This p age intention ally left blank ..
Board Manu al 13 Introduction 1 1.1 Docum e n t Pu r pos e a nd Scop e Thi s do cume n t desc ri bes the In tel ® IQ 80 32 1 Eval uatio n P latfo rm Bo ard .
14 Board Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Int roduc ti on 1.3 Electronic In formation 1. 4 Component Re fere n ces Ta b l e 3 pr ovi des add itio nal info rmati on o n the m ajor comp on ents of IQ80 32 1.
Board Manu al 15 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm Int roduc t ion 1.5 T erms an d Defi nit i ons T a bl e 4 . T e rm s a nd D efi nit ions Ac rony m/T erm Defi niti on ARM Re fer s t o bo t h the micro pro ce ssor ar chit ec ture a nd t he com pan y that li ce ns es it .
16 Board Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Int roduc ti on 1.6 I ntel ® 803 21 I/O Processo r About the I ntel ® 80321 I/O pr oces sor . The Intel ® 803 21 I/O pro cessor c ombines the I ntel ® XScale™ core with p owerf ul new featur es to create an in tellig ent I/O proces sor .
Board Manu al 17 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm Int roduc t ion It is a n integr ated p rocesso r that add resses the needs of in tellig ent I/O appl ications and help s red uce intellig ent I /O sys tem cos ts. The P C I Bu s is a n in dustr y sta n dard , hig h p erf orma nce lo w la tency sys tem bu s.
18 Board Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Int roduc ti on 1.7 I ntel ® IQ80321 Evaluat ion Platform Board Featu res T able 5. Summ ary of Fea tures Featur e Def init ion B attery Bac kup Uni t: B attery bac k up circ u it for SDR AM – 64 M B f or 72 ho u rs.
Board Manu al 19 Getting S tarted 2 The I Q 80321 is a so ftwar e de v elop ment e nvir onm e nt for I nte l ® 803 21 I/O proc ess or . 2.1 Kit Content The I Q 803 21 K it conta ins the fol low ing i.
20 Board Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Getting Started 2.3 Factory Setting s Make s ure that th e swi tch/ju mper s ettin gs are set to pr oper po sitio ns as explained in Sectio n 3.10, “Swit ches and Jumpers ” on page 52 .
Board Manu al 21 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm Ge tting Started 2.5 T arget M onito rs 2.5 .1 Re dha t Re db oot Re dBoo t * i s an a cr o n ym f or “ R ed Ha t E mb edd ed.
22 Board Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Getting Started 2. 5. 2 AR M F i rmw ar e S uit e The ARM Firmware S uite is a package o f low-level r outines an d librari es t.
Board Manu al 23 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm Ge tting Started 2.5. 2.1 ARM An gel Ange l is one of the de bug monit or pro gra ms f or 8 032 1. It is prov ide d in s ou rce an d bin a ry for m wit h the AR M Sof tw are D eve l opmen t T oolki t.
24 Board Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Getting Started 2.6 Host Commu nications E xamples How to com mu nicate to the ho st. 2.6.1 Ser ial-UART Commun ication Using a seri al connecti on: 2.6 .2 Et h erne t- Ne tw ork Com m uni cat io n Usin g a ne two rk con nectio n: Figure 2.
Board Manu al 25 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm Ge tting Started 2.6 .3 JT AG D ebug C omm unic ati on Usi ng a J T A G E mu lator : Figure 4.
26 Board Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Getting Started 2.6.4 GNUPro GDB/Insight 2.6 . 4 .1 C om mu nic a ti n g wi t h Re dboo t Har dwa re S etu p: • Host with UNIX.
Board Manu al 27 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm Ge tting Started T o br i ng up a Hy pe r T ermi n al s e ssi on o n a W in3 2 pl at fo rm : G o to S tar t, Pr ogra ms , Ac ce.
28 Board Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Getting Started 2. 6.4.2 Conn ecting with GDB Below ar e the GD B comm ands entered from th e comma nd p rompt. Be su re system p ath is s et to access “xscale- elf-gdb.exe” .
Board Manu al 29 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm Ge tting Started 2.6 .5 ARM Ex tend ed De bugge r For further inf or matio n on the A X D Deb ugg er, r ef er to the co nten t of the A RM ADS .
30 Board Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Getting Started This p age intentiona lly le ft blank..
Board Manu al 31 Hardware Refere nce Sec t ion 3 3.1 Functional Di agram Figure 5 sho ws th e functio nal b lock fo r the IQ 80 321. Figure 5. Functional Block Diagram A9517-01 Intel ® 80321 I/O Proc.
32 Board Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Hardware Refer ence Section 3.2 Board Form-Factor/ Conn ectivity Ta b l e 6 summ arizes the form-fact or and conn ectivity f eatures fo r the IQ80 321.
Board Manu al 33 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm Har dware R e ference S ec tion 3.3 Power The I Q 803 21 draw s po we r fr om th e PC I- X bus . T he p ow er r equ irem en ts fo r the IQ 80321 a re sho wn in Ta b l e 7 below .
34 Board Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Hardware Refer ence Section 3.4 Memory Subs ystem Memo ry subs ystem cons ists of the SD RA M as w ell as th e Flas h mem ory sub sys tems. 3.4.1 DDR SDRAM The DDR SDRAM in terface con sists of a 64-bit w ide data path to suppor t 1.
Board Manu al 35 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm Har dware R e ference S ec tion 3.4.2 Flas h Mem or y Re quirem ents T ot al Flash mem ory size i s 8 MB .
36 Board Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Hardware Refer ence Section 3.5 I ntel ® 803 21 I/O Processo r Operation Mode Pl ease re fe r to us er sw i tch es s ect i on fo r m od e set ting du ri ng re set .
Board Manu al 37 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm Har dware R e ference S ec tion 3.6 Int errupt Rout in g The IQ80 32 1 Inter ru pt rou ting .
38 Board Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Hardware Refer ence Section 3.7 I ntel ® IQ80321 Evalu ation Platfo rm Board Perip heral Bus The I Q8 0321 p opu late s th e per iph eral b us as de pic ted by Figure 8 . The d evic es on the bus in clud e F lash RO M , UA R T , HEX di sp lay , and rot ary switch .
Board Manu al 39 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm Har dware R e ference S ec tion 3.7 . 1 Fla sh ROM T a ble 12. Flash RO M Fe atures Description Flas h i s an In tel ® S t rat.
40 Board Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Hardware Refer ence Section 3.7.2 UART T able 13. UART F eatures Description UA RT on th e pe rip he ral bu s is pa rt of t he 16C 5 50 fa mi ly . The co nn ecti on to the p er i phe ral bus is dep ict ed b y Fi gur e 1 0 .
Board Manu al 41 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm Har dware R e ference S ec tion 3.7 . 3 HE X Di sp la y T a ble 14. HE X Display on the P erip heral Bus Description The I nte l ® IQ 8032 1 Eval ua tio n Pla tfo rm Bo ard incl ud es a HEX Disp lay u ni t on t he per iph eral bu s.
42 Board Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Hardware Refer ence Section 3. 7. 4 Ro t ar y S w i tch The I Q8 032 1 pro vide s a R otar y S w itch f or the us er to se lect fr om d iffe re nt boot -up fla vor s .
Board Manu al 43 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm Har dware R e ference S ec tion 3. 7.5 B at tery Status T a ble 16. Battery S tatu s Buffer Requiremen ts Description The I nte.
44 Board Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Hardware Refer ence Section 3.8 Debug In terface 3.8. 1 C onso le Ser ial Por t Th e pl at for m ha s one seri al p or t fo r d ebu g pu rp os e s a s d es cri be d in S ecti o n 3 .
Board Manu al 45 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm Har dware R e ference S ec tion 3.8 . 3 JT AG Deb ug The IQ 803 21 has a 20 -pin J T AG con nector t hat is in comp liant with ARM M ul ti-ICE guid eline s. 3.8. 3.1 JT AG Port 3.
46 Board Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Hardware Refer ence Section 3.8. 5 Mic to r J3 F2 Wa r n i n g : Be sure to fully und erstand the pin assig nment s of the part icula r logic an alyzer bein g used before conne cting to t he I ntel ® IQ8031 0 Evalu ati on Pl atform Boar d.
Board Manu al 47 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm Har dware R e ference S ec tion 3. 8.6 M ict or J2 F 1 Wa r n i n g : Be sure to ful ly understa nd the pin ass ignments of the particu lar logic ana lyzer being us ed before conne cting t o th e Intel ® I Q80310 Eva lua tion Pla tfor m Board.
48 Board Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Hardware Refer ence Section 3.8. 7 Mic to r J1 C1 Wa r n i n g : Be sure to fully und erstand the pin assig nment s of the part icula r logic an alyzer bein g used before conne cting to t he I ntel ® IQ8031 0 Evalu ati on Pl atform Boar d.
Board Manu al 49 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm Har dware R e ference S ec tion 3. 8.8 M ict or J3 C1 Wa r n i n g : Be sure to ful ly understa nd the pin ass ignments of the particu lar logic ana lyzer being us ed before conne cting t o th e Intel ® I Q80310 Eva lua tion Pla tfor m Board.
50 Board Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Hardware Refer ence Section 3.8. 9 Mic to r J2 C1 Wa r n i n g : Be sure to fully und erstand the pin assig nment s of the part icula r logic an alyzer bein g used before conne cting to t he I ntel ® IQ8031 0 Evalu ati on Pl atform Boar d.
Board Manu al 51 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm Har dware R e ference S ec tion 3.9 Board Reset Scheme Figure 15 de pic t s t he rese t s c he me fo r t h e IQ 80 321 . Ta b l e 2 3 l ist the re set s chem es fo r th e IQ 8032 1.
52 Board Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Hardware Refer ence Section 3.10 Switche s and Jump ers 3.10.1 Switc h S umm ary T ab le 24.
Board Manu al 53 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm Har dware R e ference S ec tion 3.10 .2 PCIX Init ial izat ion Su mm ary Figure 16 show s a ro uting g uid ance on ho w P CI-X mo de is det ermin ed/imp lemen ted o n th e sec on dar y side o f th e P CI- X bri dge.
54 Board Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Hardware Refer ence Section 3. 10 .3 Defa ul t S wi t ch S etti n gs - V i su al T able 25.
Board Manu al 55 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm Har dware R e ference S ec tion 3.10. 4 Jump er Summa ry 3.10.5 Con nector Summa ry 3.10 .6 Gene ral P urp ose In put/O utpu t Hea de r Th e bo ar d has th ree pr ogr amma ble ge nera l-p urpo se I/O pi ns (GP IO 0- 3 on th e 80321 ).
56 Board Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Hardware Refer ence Section 3.10.7 Seco nda ry P CI/PCI -X Op er atio n Sett ings 3.
Board Manu al 57 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm Har dware R e ference S ec tion 3.10 .9 Det a il Desc ri ption s of Swit ch es/Ju mpe rs 3.
58 Board Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Hardware Refer ence Section 3. 10.9.2 Swit ch S7E1- 4/5 3.1 0 .9 .2 . 1 Sw itch S 7 E 1 - 4 This allo ws 8 032 1 to hide the d evi ce in P CI-X Slot 1 un der GPIO con trol. 3.1 0 .
Board Manu al 59 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm Har dware R e ference S ec tion 3.10.9.4 Switc h S7E1- 8 T a ble 4 5. Switch S7E1 - 8: Des criptions Swi tc h As soc ia t io n Des cri p tio n Fa cto ry D e fa ult S7 E1- 8 S PCI -X C lo ck Ena bl es SP C I-X cl oc k ci rc uit e na bl e.
60 Board Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Hardware Refer ence Section 3. 10.9.5 Swit ch S8E1- 2 T u rn On t o en able o n- boar d G iga bit E th ern e t, ot her wis e O ff fo r b ett er PC I- X lo adin g/p e rf orm anc e.
Board Manu al 61 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm Har dware R e ference S ec tion 3.10.9.8 Switc h S8E1- 5 When this in put is pu lled h igh (o f f), th e br idge chan ges the out put i mped anc e o f the dri ver s to the oppo si te st ate th an w as assu med by def ault , a s sh own in Ta b l e 5 4 belo w: 3.
62 Board Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Hardware Refer ence Section 3. 10.9.10 Switch S8E 1- 7 Used to e nable the IDSEL reroute function a t reset or power-up . T he re set value of the sec ondary bus private devi ce mask register is mo dified according t o the tie va lue of th e IDSEL_REROU TE_EN pin.
Board Manu al 63 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm Har dware R e ference S ec tion 3.10.9.12 S witch S8E 2 - 1/2 Thi s feature fo rces the P CI-X Capab ility pin s fo r the expa ns ion sl ot to fo rce a conf igu ration o n the Secondar y PCI-X bus.
64 Board Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Hardware Refer ence Section 3. 10.9.14 Switch S9E 1 - 1:3 3. 10.9.15 Switch S9E 1 - 4 T able 66.
Board Manu al 65 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm Har dware R e ference S ec tion 3.10.9.16 Switc h S1D1 - 1/2 Swit che s 1 an d 2 hav e to a lwa ys b e op posit e of e ach ot her . 3.10.9.17 Switc h S4D1 - 1/2 Swit che s 1 an d 2 hav e to a lwa ys b e op posit e of e ach ot her .
66 Board Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Hardware Refer ence Section 3. 10.9.19 Jumper J1G 2 3. 10.9.20 Jumper J3E 1 3. 10.9.21 Jumper J3G 1 Initializat ion Dev ice Select: Use d as a chi p se lect during co nfigurat ion re ad a nd wr ite t rans actio ns on th e seconda ry bus .
Board Manu al 67 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm Har dware R e ference S ec tion 3.10.9.22 Ju mper J9E 1 Base Addr e ss R egister Enable: Used to en able the b ase address register at reset or powe r -u p .
68 Board Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Hardware Refer ence Section This p age intentiona lly le ft blank..
Board Manu al 69 Exte rnal RAID Sect ion 4 The IQ 80321 provid es the cap ability f or the us er to deve lop RA ID applicatio ns. Ther e is a requir ement to p rovide t he ab ility of ma kin g the second ary PCI-X d evices priv ate and the a bility to route t he in terrup t line s.
70 Board Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm External RAI D Section 4. 2 Inte r r up t Routi ng The i nter ru pt l ines f or de vices o n the SP CI -X b us (E xpa nsion S lot and Inte l ® 825 44 G igab it Et her net Controller r) are rout ed based on requir ements.
Board Manu al 71 Softwa re Re fe renc e 5 5.1 DRAM For DD R SD RA M Size s an d Co nf igu rations , se e se ctio n 7.2 .2.1 , table 1 39 of t he Inte l ® 8032 1 I/ O Pr ocessor Devel oper ’ s Manual .
72 Board Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Software Refer ence 5.2.1 Flash RO M The Flash ROM is an 8 M B Intel ® St r ata F la sh ® (part# 38 F640) th at sits on th e Peripheral Bus and is accessed using P CE0.
Board Manu al 73 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm Software R eference 5.2.2 UART The UAR T is a TL16C550C. It sits o n the Peripheral B us and is accessed using PCE1 and XINT1 # as sh ow n i n F igure 20 : See data sheet at th e fo llowin g lin k for more i nformat ion and a p in la yout of thi s devic e: ht tp://foc u s.
74 Board Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Software Refer ence 5.2.4 HEX Disp la y The H EX D is pla y is an A g ilent * H DSP -G211, wh ic h all ows f or m oni tor ing of t wo dig its.
Board Manu al 75 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm Software R eference Figure 24. Register Bitmap: 7-Segmen t Display LSB FE85 0000 h (Write Only).
76 Board Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Software Refer ence 5.3 Ethernet The 8254 4EI u tilize s a 32/64 -bit, 33 /66 MHz dir ect-i nterface to the PCI bus. The co ntr oller in terfaces with the 803 21 thr ough on- chip comm and/statu s regi sters and using a shared m emo ry area.
Board Manu al 77 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm Software R eference 5.4 Board Suppo rt Package ( BSP) Examples Examp les pr ov ided in th is section are ba sed on the R ed H at* Redboo t soft war e runn ing on the IQ80 32 1 bo ard .
78 Board Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Software Refer ence 5.4. 2 R edbo o t* In te l ® I Q80 32 1 Mem o ry M ap The virtual m emory ma ps us e a C, B, and X column t o indicate the cach ing po licy for the r egion.
Board Manu al 79 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm Software R eference 5.4 .3 Re dboot In te l ® IQ 803 21 P hy sical Me mor y M ap - Visual Fi gur e 2 6.
80 Board Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Software Refer ence 5.4. 4 R edbo o t Inte l ® IQ8 032 1 Virtua l Mem o ry Map - Visua l Figu re 27 .
Board Manu al 81 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm Software R eference 5.4 .5 Re dboot In te l ® IQ 803 21 Fi les Attache d in the kit, find a copy of the Red Hat eCos for Intel ® 80321 I/O processor r CD.
82 Board Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Software Refer ence 5.4.6 Redboot Intel ® IQ80321 DDR Memory Initializ ation Sequence In order to set the correct ECC bits, a D DR memo ry system (DIM M or discre te compone nts) mu st be written to with a kn own value.
Board Manu al 83 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm Software R eference 5.4 .7 Re dboot S wit ch ing • S8E1-2 ON: E nable GbE on t he SPCI-X B us. • S8E1-7 OFF: P CI-X Br idge hide s devic es using Pri vate S pace Addre ss li nes.
84 Board Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Software Refer ence This p age intentiona lly le ft blank..
Board Manu al 85 IQ803 10 and IQ80 321 C omparisons A This app endix p rovides a brie f descrip tion f or differences be twee n IQ803 21 and IQ8031 0. Pl ease also refer t o applicat ion n ote : Mig rating fr om th e Intel ® 80310 I/O Pr oc e sso r Chipset to the In tel ® 80321 I/O P r oces sor A pplicat ion Note 273 56 2.
86 Board Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm IQ80310 and IQ80321 Co mpariso ns This p age intentiona lly le ft blank..
Board Manu al 87 Getting S t arted and Debugger B B.1 Int rodu ction This appen dix per tains to Cod e|Lab versio n 2.2 and earl ier , w hich uses the M icrosoft V is ual Studio 6 .0. F or Co de| Lab vers io n 2 .3 and later, refe r to Appendix C, “Getti ng S t art ed a nd Debugge r” .
88 Board Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Getti ng Starte d a n d D ebu gg er B.1. 4 Rela te d Web Si tes • Ma cr aigor : http: //www .ocde mon.n et / • http :// devel oper .int el.com/ design/i nte lxscal e/dev _too ls/020523/ inde x.
Board Manu al 89 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm G et tin g Sta rt ed a nd D e bu gge r B.2 Setup B. 2.1 Hardw ar e Se tup Us e Figure 2 8 and the rest o f the In te l ® IQ 80 321 E va lua tion Platf or m Bo ard Ma nual , t o s e t u p th e har dw are .
90 Board Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Getti ng Starte d a n d D ebu gg er B. 2.2 Soft war e Se tup A TI Co de|Lab is a plug-in to M icrosof t V isual S tudio 6.0; therefo re, Micro soft V isual Studio 6.0 mu st be installed o n the ho st system bef ore install ing A TI Code|Lab .
Board Manu al 91 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm G et tin g Sta rt ed a nd D e bu gge r B.3 New P roject Set up B. 3.1 Creat i n g a N ew Proj e ct 1. Launc h Code |La b EDE an d se lect “T ools /Cust omize/Ad d-ins/ Macro Files ”.
92 Board Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Getti ng Starte d a n d D ebu gg er B.3. 2 C on fi gu ra ti on On the to ol b ar, click on the ico n that loo ks lik e a fil e folder wit h the letter s “EDE ” on it . When t h e mouse ar row is p laced o n it, a text b ox displ ays “Proj ect Settin gs”.
Board Manu al 93 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm G et tin g Sta rt ed a nd D e bu gge r B.4 Fl ashin g with JT AG B. 4.1 O ve rv iew Code|L ab and the Raven are capab le o f readin g fro m, wr iting to , and era sing t he conten ts of the Flash on the ev aluation board.
94 Board Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Getti ng Starte d a n d D ebu gg er B.4. 2 Usin g Fl ash P rog r amm er Note: T he parallel p ort must be s et t o EPP mo de o r the Mac raig or R aven wi ll no t w ork pr ope rly .
Board Manu al 95 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm G et tin g Sta rt ed a nd D e bu gge r B.5 D e bug gi ng Out of Flas h JT AG debugg ers can be u sed on two leve ls; with or witho ut the sour ce code.
96 Board Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Getti ng Starte d a n d D ebu gg er B.7 Ru nni ng th e Code |Lab De bug ger This s ectio n is provi ded t o ge t the sys tem up and run nin g in the Co de|L ab Deb ug e nvi ronm ent, b ut it is not inten ded as a full-funct ional tut orial.
Board Manu al 97 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm G et tin g Sta rt ed a nd D e bu gge r B.7.2 Man ua lly Load in g an d Ex ec ut ing an Applic at ion Progr am 1. Launc h the Code |L ab Deb ug Env ironment from the de sktop icon.
98 Board Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Getti ng Starte d a n d D ebu gg er B.7. 4 Using B reak po ints Note the small gr ay circles on the sidebar beside e ach line of s ource code. S ingle-cl ick any of the se gray circles and a red dot appears.
Board Manu al 99 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm G et tin g Sta rt ed a nd D e bu gge r B.7 . 5 Ste pp in g Th r ough t he C o de The “led.c” file contain s a fu nc tion that is called from cod e in “blink.c”. T is exercise st eps through the code and uti lizes a few of the mos t commo n step tools.
100 Boar d Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Getti ng Starte d a n d D ebu gg er B.8 E x pl ori ng th e Code|Lab Debug Windows This sectio n discusse s some basics of the debu g environmen t. Som e of th ese windows and concepts have been dealt wi th duri ng pre vious exer cises in t his man ual.
Board Manu al 101 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm G et tin g Sta rt ed a nd D e bu gge r B.8 . 6 R eg is te rs Wi nd ow Clos e all the activ e windo ws, th en bring up the Regis ters wi ndow . Resize the thi s win dow an d its columns to get a g ood vi ew of all the register s.
102 Boar d Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Getti ng Starte d a n d D ebu gg er B.9 De b uggi ng Ba sic s B.9. 1 Ove rvie w D e bugg e r s a l lo w d e vel o pe r s t o i n t e rr og at e a ppl ica ti o n co de b y al l o wi ng p ro gr a m flo w co nt rol , d ata obser vation, an d d ata m ani pulation .
Board Manu al 103 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm G et tin g Sta rt ed a nd D e bu gge r B.9 .3 Exc ep tio ns/T rapp in g A de bug e x cepti on c aus es the p roc esso r to re- direc t exe cutio n to a de bug e vent hand lin g ro uti ne.
104 Boar d Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Getti ng Starte d a n d D ebu gg er This p age intentiona lly le ft blank..
Board Manu al 105 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm G et tin g Sta rt ed a nd D e bu gge r Getting S tarted and Debugger C C.1 Int rodu ction Th is ap pe nd ix p e rta i ns to Cod e| L ab v er si o n 2. 3 an d l a te r wh ic h u se s Mi cr os of t 's V i su a l S t ud i o .
106 Boar d Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Getti ng Starte d a n d D ebu gg er C.1. 4 Rela te d Web Si tes • Ma cr aigor : http: //www .ocde mon.n et / • http :// devel oper .int el.com/ design/i nte lxscal e/dev _too ls/020523/ inde x.
Board Manu al 107 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm G et tin g Sta rt ed a nd D e bu gge r C.2 Set up C. 2.1 Hardw ar e Se tup Us e Figure 2 8 and the rest o f the In te l ® IQ 80 321 E va lua tion Platf or m Bo ard Ma nual , t o s e t u p th e har dw are .
108 Boar d Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Getti ng Starte d a n d D ebu gg er C. 2.2 Soft war e Se tu p A TI Code | La b is a plu g-in to Micros oft V isual S tudio . NET , t herefor e Microsof t V isual S tudio .NET must alr eady be loaded on t he syste m.
Board Manu al 109 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm G et tin g Sta rt ed a nd D e bu gge r C.3 New P roject Set up C. 3.1 Creat i n g a N ew Proj e ct 1. Launc h Code |La b EDE for .NET . 2. On th e Star t P a ge , s el ec t “N e w P roj ec t” .
110 Boar d Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Getti ng Starte d a n d D ebu gg er C.3. 2 C on fi gu ra ti on Examine the mai n menu of Cod e|Lab EDE f or .NET . Since Code|Lab is a plug- in to V isual Studio, some o f these menu items are V isu al Studio and s ome are specific t o Code|Lab .
Board Manu al 111 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm G et tin g Sta rt ed a nd D e bu gge r C.4 Fl ashin g with JT AG C. 4.1 O ve rv iew Code|L ab and Rav en are capa ble of readin g from, wr itin g to, and eras ing the con tents of the Flash on the evalu atio n board.
112 Boar d Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Getti ng Starte d a n d D ebu gg er C.4. 2 Usin g Fl ash P rog r amm er Note: T he paralle l port must be set to EPP mod e or the Macraig or Raven will not work prope rly . Down load the R edB oot executable f iles f rom t he follo win g lo cation: http :// devel oper .
Board Manu al 113 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm G et tin g Sta rt ed a nd D e bu gge r C.5 D e bug gi ng Out of Flas h JT AG debugg ers can be u sed on two leve ls; with or witho ut the sour ce code.
114 Boar d Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Getti ng Starte d a n d D ebu gg er C.7 Ru nni ng th e Code |Lab De bug ger This s ectio n is provi ded t o ge t the sys tem up and run nin g in the Co de|L ab Deb ug e nvi ronm ent, b ut it is not inten ded as a full-function al tutori al.
Board Manu al 115 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm G et tin g Sta rt ed a nd D e bu gge r C.7 . 3 D is pla yi ng S o urce C o de 1. Launc h the Code|Lab E DE Debug ger a nd open the “T ester321LED” ELF program. Note: Use th e Fil e/ R ec en t P r o g ram s m e n u fo r q ui c k ac ce s s.
116 Boar d Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Getti ng Starte d a n d D ebu gg er C. 7 .5 S te ppin g Throu gh t he Co de The “led.c” file con tains a fun ction that is called f rom cod e in “blin k.c”. This exerc ise steps thr ough the code an d utilizes a f ew of the m ost com mon step too ls.
Board Manu al 117 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm G et tin g Sta rt ed a nd D e bu gge r C.8 E xplo r ing the Code| Lab Deb ug Wi ndo ws This section d iscusses som e basics o f the debug en vironm ent. Some of th ese windo ws and co ncepts hav e bee n de a lt with dur ing pr evio us ex erc ises in thi s man ual .
118 Boar d Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Getti ng Starte d a n d D ebu gg er C.8. 6 Reg ist ers Win dow Close al l the active w indow s, then br ing up t he Re gisters win dow . R es ize the this w indow and its colum ns to g et a good view of all th e reg isters.
Board Manu al 119 In te l ® IQ8 0321 I/O P rocessor Evaluation Platfo rm G et tin g Sta rt ed a nd D e bu gge r C.9 D e bug gi ng Basi cs C. 9.1 O ve rv iew De bugge rs allow de velo per s to int e rroga te app licatio n co de b y allo wi ng p ro gra m flo w co ntr ol, d ata obs ervation , and data ma nipu latio n.
120 Boar d Manual In te l ® IQ80321 I/O Proc essor Evalua tion Platfo rm Getti ng Starte d a n d D ebu gg er C.9.3 C.9. 3 Exc epti ons/T rap ping A debug exceptio n causes the processor to re-direct executi on to a debu g event handling r outine.
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