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T echnical Reference Manual Hardware and BIOS HP Vectra VL 5/xxx Series 5 and XA 5/xxx PC.
Notice The information contained in this document is subject to change without notice. Hewlett-Packard makes no warranty of any kind with regard to this material, including, but not limited to, the implied warranties of merchantability and fitness for a particular purpose.
iii Preface This manual is a technical reference and BIOS document for engineers and technicians providing sy stem level support. It is assumed that the reader possesses a detailed understanding of A T -compatible microprocessor functions and digital addressing techniques.
iv Bibliography ❒ HP Vectra VL 5/xxx Series 5 User’s Guide (D4550-9000 1). ❒ HP Vectra VL 5/xxx Series 5 Minitower User’s Guide (D4570-90001). ❒ HP Vectra XA 5/xxx User’s Guide (D3984-90001 ). ❒ HP Vectra XA 5/xxx Minitower User’s Gui de (D3985-90 001).
Contents v Preface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iii Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iii Bibliography. . . . .
Contents vi Devices on the Processor-Local Bus . . . . . . . . . . . . . . . . . . . . . . . . . . 30 The Intel Pentium Microprocessor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Cache Memory . . . . . . . . . . . . . . . . . . . . . .
Contents vii Mass-Storage Drives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 Hard Disk Drives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 Flexible Disk Drives . . . . .
Contents viii 5 Power-On Self-T est and Error Messages Order in Which the T ests are Performed . . . . . . . . . . . . . . . . . . . . . . 86 Error Message Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 Beep Codes .
9 1 System Overview This manual describes the HP V ectra VL 5/xxx Series 5 and XA 5/xxx PC , and provides detailed sy stem specifications. This chapter introduces the external features, and lists the specifications and characteristic data of the sy stem.
10 1 System Overvi ew Package Package Desktop Package Product inf ormation Fron t logo does not sho w processor speed or series information appears on a label on the lo w er fr ont r ecess or Wty: WBK.
11 1 System Overvie w Package Minitower Package Wty: WBK@ Sup: SAB@ Model XA 5/200 Prod: D3993A #ABA S/N: FR63498765 Front la bel does not sho w pr ocessor speed or series inf ormation.
12 1 System Overvi ew Package Plan view of the Chassis Base of the Desktop Package The above illustrations shows a plan view of the desktop model, seen from above. All dimensions are in millimeters. The mounting holes for the second hard disk (95.20 ✕ 44.
13 1 System Overvie w Specifications and Characteristic Data Specifications and Characteristic Data Status Panel Physical Characteristics System Processing Unit Desktop Minitower Weight 9 kg (20 lbs) 15 kg (33 lbs) Dimensions 39 cm (D) by 42 cm (W) by 12.
14 1 System Overvi ew Specifications and Characteristic Data Environmental Specification Operating temperature and humidity ranges may vary depending upon the mass storage devices installed. High humidity levels can cause improper operation of disk drives.
15 1 System Overvie w Specifications and Characteristic Data Electrical Specification For the desktop models: 1. Dependant on operating system and PC configuration Parameter Limit for the Power Supply.
16 1 System Overvi ew Specifications and Characteristic Data For the minitower models: When the computer is turned off, but left plugged in at the mains, the power consumption falls below 5 watts, but is not zero.
17 1 System Overvie w Documentation Documentation The table below summarizes the availability of documentation that is appropriate to the HP V ectra VL and XA 5/xxx PC s. Three dots, ‘...’, are used to indicate ‘VL ’ or ‘XA ’, as appropriate.
18 1 System Overvi ew Documentation Where to Find the Information The following table summarizes the availability of information within the HP V ectra VL and XA 5/xxx PC documentation set.
19 2 System Board The next chapter describes the video, disk, audio and network devices which are supplied with the various models of the computer . This chapter describes the components of the sy ste.
20 2 System Board System Board System Board The video memory , video memory upgrade sockets, graphics controller and display connector are not loaded on any models that are supplied with a Matrox MGA Millennium board in a PCI accessori es slot.
21 2 System Board Architectural View Architectural View Level- Two Cache Main Memory Hard disk Pentium Processor 8237 1 SB PCI/IS A Bridge (PIIX3) Processor-L ocal Bus (64 bit, 60/66 MHz) PCI Bus (32 bit, 30/33 MHz) IS A Bus (16 bit, 7.
22 2 System Board Chip-Set Chip-Set The chip-set comprises three chips. These interface between the three main buses (the Processor -Local bus, the PCI bus and the ISA bus). • The TXC chip (82439HX) is a combined PL/PCI bridge and cache controller and main memory controller and PCI-to-PL bus data pa th .
23 2 System Board Chip-Set PCI Bus Interface Sequential PL-to-PCI memory write cycles are translated into PCI zero wait state burst cycles. The maximum PCI burst transfer can be from 256 bytes to 4 KB. The chip supports advanced snooping for PCI master bursting, and provides a pre-fetch mechanism dedicated for IDE read.
24 2 System Board Chip-Set accesses to related addresses, they do not need four independent accesses to main memory , but can be organized as a pipelined burst. The second, third and fourth cycles in each burst require less time to complete than the first.
25 2 System Board Chip-Set PCI/ISA Bridge Chip ( 8237 1SB ) This chip is encapsulated in a 208 pin plastic quad flat pack (PQFP) package. PCI Bus Interface This part of the chip performs PCI-to-ISA, and ISA-to-PCI bus cycle translation. It supports the Plug-and-Play mechanism.
26 2 System Board Chip-Set Super I/O Chip ( 37C9 32 ) The Super I/O chip (FDC37C932) is contained within a 160-pin PQFP package. The chip provides the control for the following devices.
27 2 System Board Chip-Set described on page 37. RTC The real-time clock (RTC) is 146818A-compatible. With an accuracy of 20 ppm (parts per million). The configuration RAM is implemented as 256 bytes of CMOS memory .
28 2 System Board Backplane boards Backplane boards Desktop (front view) PCI Slot #3 (J1) PCI Slot #2 (J3) PCI Slot #1 (J4) Desktop (rear view) Half length PCI (proprietar y networ k) slot Minitower (.
29 2 System Board Backplane boards 1. HP proprietary slot on the rear side of the desktop back plane board 2. To accommodate ISA boards up to a maximum length of 1 6 cm (6.
30 2 System Board Devices on the Processor -Local Bus Devices on the Processor-Local Bus The Intel Pentium Microprocessor The Pentium processor is packaged in a pin-grid-array (PGA), and is seated on the sy stem board in a zero-insertion-force (ZIF) socket 7 .
31 2 System Board Devices on the Processor-Local Bus Bus Frequencies The location of the sy stem board switches is shown in the diagram on page 20. Five of these switches (SW -1,2,3,4 and 7) determine the working frequencies of the PC, and the three frequency multipliers (M1, M2 and M3), as summarized in the table below .
32 2 System Board Devices on the Processor -Local Bus Setting the switches to operate at a slower speed, than the processor is capable of supporting, can still cause erratic behavior in some case, and would reduce the instruction throughput in others.
33 2 System Board Devices on the Processor-Local Bus Each bank that is used must contain a pair of identical modules: the same speed (60 or 70 ns), the same width (32-bit or 36-bit), and the same technology ( extended data out , EDO, or fast page mode , FPM).
34 2 System Board Devices on th e PCI Bus Devices on the PCI Bus The distribution of the interrupt lines is described more fully on page 82. Models without any PCI boards, such as the Matrox Millennium Graphics controller or the Ethernet Network controller , are supplied with a PCI terminator .
35 2 System Board Devices on the PCI Bus to a channel, it should be in the master position (the connector that is closest to the sy stem board, unless the markings on the cables state otherwise).
36 2 System Board Devices on th e PCI Bus Universal Serial Bus (USB) Controller When the HP V ectra VL 5/xxx Series 5 and XA 5/xxx PC s were first released, they were preloaded with the Microsoft W indows 95 operating sy stem, version SR2. The Microsoft Supplement 2.
37 2 System Board Devices on the ISA Bus Devices on the ISA Bus Super I/O Controller The Super I/O chip (37C932) is part of the chip set, and is described on page 26.
38 2 System Board Devices on th e ISA Bus Flash EEPROM (the System ROM) The computer uses 256 KB of Flash EEPROM implemented within a single 256 K ✕ 8-bit ROM chip (or in two 128 K ✕ 8-bit chips).
39 2 System Board Devices on the ISA Bus System Board Switches Five of the sy stem boar d switches (whose location is shown on page 20) set the working frequencies for the computer , as summarized on page 31. The others set the configuration for the computer , as summarized in the table on the next page.
40 2 System Board Devices on th e ISA Bus Updating the BIOS Before Considering Replacing the System Board If the computer is faulty , but it starts up correctly , and the fault is not clearly due to the sy stem board hardware, then it is advisable to check the BIOS version number .
41 3 Interface Devices and Mass-Storage Drives This chapter describes the video, mass storage, audio and network devices which are supplied with the computer .
42 3 Interface Devices an d Mass-Storage Drives S3 Trio 64V2 Graphics Controller Chip S3 Trio 64V2 Graphics Controller Chip Most models of the HP V ectra VL 5/xxx Series 5 PC are supplied with a graphics controller chip integrated on the sy stem board.
43 3 Interface Devices and Mass-Storage Drives S3 Trio 64V2 Graphics Controller Chip Video Modes Standard and Enhanced Vi deo Graphics Array (VGA) modes are available. Hardware acceleration of graphical user interface (GUI) operations is provided, and acceleration for 8, 16 and 32-bit pixel depths.
44 3 Interface Devices an d Mass-Storage Drives S3 Trio 64V2 Graphics Controller Chip The extended modes supported by the video BIOS are: Extended V ideo Modes with 1 MB DRAM Extended Mode No.
45 3 Interface Devices and Mass-Storage Drives S3 Trio 64V2 Graphics Controller Chip Extended V ideo Modes with 2 MB DRAM 71h 111h graphics 640 x 480 65,536 60 31.5 25.175 71h 111h graphics 640 x 480 65,536 72 37.5 31.500 71h 111h graphics 640 x 480 65,536 75 37.
46 3 Interface Devices an d Mass-Storage Drives S3 Trio 64V2 Graphics Controller Chip Available Video Resolutions Drivers are supplied with the computer . At the time of release, these bear the version number: A.02.04. The following table lists the available video resolutions using these drivers.
47 3 Interface Devices and Mass-Storage Drives S3 Trio 64V2 Graphics Controller Chip If Vi deo Plug and Play is enabled in Setup , and a DDC monitor is detected, Setup will automatically configure the best refresh rate. For non DDC monitors, or when video Plug and Play is disabled , refresh rates can be changed in Setup .
48 3 Interface Devices an d Mass-Storage Drives Matrox MGA Millennium Graphics Controller Board Matrox MGA Millennium Graphics Controller Board All models of the HP V ectra XA 5/xxx PC and a few models of the HP V ectra VL 5/xxx Series 5 PC are supplied with a Matrox MGA Millennium PCI graphics controller on a board fitted in a PCI accessory slot.
49 3 Interface Devices and Mass-Storage Drives Matrox MGA Millennium Graphics Co ntroller Board Connectors The Vi deo Electronics Standards Association (VESA) defines a standard video connector , variously known as the VESA feature connector , auxiliary connector , or pass-through connector .
50 3 Interface Devices an d Mass-Storage Drives Matrox MGA Millennium Graphics Controller Board The table below summarizes the 2D video resolutions which are supported. Note, though, SCO Unix only supports 15 bpp (bits per pixel), instead of 16 bpp, and does not support 32 bpp; OS/2 does not support 24 bpp.
51 3 Interface Devices and Mass-Storage Drives Matrox MGA Millennium Graphics Co ntroller Board Drivers are supplied with the computer . At the time of release, these bear the following version numbers: ❒ 1.22p for Windows for Workgroups 3.11 ❒ 3.
52 3 Interface Devices an d Mass-Storage Drives HP Ethernet 10/100 BaseT Network Board HP Ethernet 10/100 BaseT Network Board The HP Ethernet 10/100 BaseT Network Boar d is supplied on all models of the HP V ectra XA 5/xxx PC . It is based on the AMD PCnet-PCI-II 79C971 network processo r chip.
53 3 Interface Devices and Mass-Storage Drives HP Ethernet 10/100 BaseT Network Board Remote Power-On (RPO) There is a cable from the Remote Start connector , on the network board, to the External Start connector , on the sy stem board. This is used by the Remote Power -On feature (RPO) that is described on page 71.
54 3 Interface Devices an d Mass-Storage Drives HP Enhanced Ethernet Network Board HP Enhanced Ethernet Network Board The HP Enhanced Ethernet Network Board is supplied on some models of the HP V ectra VL 5/xxx Series 5 PC . It is based on the AMD PCnet-PCI-I I 79C970 network processor chip.
55 3 Interface Devices and Mass-Storage Drives Audio Controller Remote Power-On (RPO) There is a cable from the Remote Start connector , on the network board, to the External Start connector , on the sy stem board. This is used by the Remote Power -On feature (RPO) that is described on page 71.
56 3 Interface Devices an d Mass-Storage Drives Audio Controller The board is compliant with Microsoft PC 95 revised / PC 96. It has a full duplex codec, and supports a volume control on the front panel. Drivers Drivers for the audio board, working with the W indows NT operating sy stem, are supplied with the computer .
57 3 Interface Devices and Mass-Storage Drives Mass-Storage Drives Mass-Storage Drives The IDE controller is described on page 34. The flexible disk controller is described on page 26. Hard Disk Drives A 3.5-inch hard disk drive is supplied on an internal shelf in some models.
58 3 Interface Devices an d Mass-Storage Drives Connectors and Sockets Connectors and Sockets IDE Hard Disk Drive Data Connector Flexible Disk Dri ve Data Connector Pin Signal Pin Signal Pin Signal Pi.
59 3 Interface Devices and Mass-Storage Drives Connectors and Sockets Audio Board Connectors Wavetable Connector Goldfinch Connector Pin Signal Pin Signal Pin Signal Pin Signal 1 Ground 2 not connecte.
60 3 Interface Devices an d Mass-Storage Drives Connectors and Sockets PCI Connector Pin Signal Pin S ignal Pin Signal Pin Signal B1 -12 V A1 TRST# B47 AD[12] A47 AD[11] B2 TCK A2 +12 V B48 AD[10] A48 Ground B3 G round A3 TMS B49 + 3.3 V A49 AD[09] B4 TDO A4 TDI B50 AD[08] A50 C/BE#[0] B5 +5 V A5 +5 V B51 AD[07] A51 + 3.
61 3 Interface Devices and Mass-Storage Drives Connectors and Sockets 16-bit ISA Connector (8-bit ISA uses the A an d B connectors) Pin Signal Pin Signal B1 Ground A1 C HCHK# B2 RESDRV A2 S D7 B3 +5 V.
62 3 Interface Devices an d Mass-Storage Drives Connectors and Sockets Socket Pin Layouts Power Supply Connector for S ystem Board Battery Pack Connector Pin Signal Pin Signal Pin Signal 1 PwrGood 13 .
63 4 Summary of the HP/Phoenix BIOS This chapter and the following two chapters give an overview of the features of the HP/Phoenix BIOS..
64 4 Summary of the HP/Phoenix BIOS HP/Phoenix BIOS Summary HP/Phoenix BIOS Summary The Sy stem ROM contains the POST (power -on self-test) routines, and the BIOS: the Sy stem BIOS, video BIOS (for models with an integrated video controller), network BIOS (for models with a network controller), and low option ROM.
65 4 Summary of the HP/Phoenix BIOS HP/Phoenix BIOS Summary XA/200 — Copyright 1997 Hewlett-Packard — HA.07.xx Any line of text can be entered here as a ‘tatoo’ for the computer BIOS version HA.
66 4 Summary of the HP/Phoenix BIOS Setup Program Setup Program To r u n t h e Setup program, interrupt the POST by pressing when the F2=Setup message appears on the initial “V ectra” logo screen. The band along the top of the screen offers five menus: Main, Configuration, Security , Power , and Exit.
67 4 Summary of the HP/Phoenix BIOS Setup Program appears in a different color , and cannot be changed. Disabling a device in the Configuration Menu (for example, Serial port B in the diagram above) has the advantage of freeing the resources (such as IRQs and peripheral addresses).
68 4 Summary of the HP/Phoenix BIOS Setup Program Security Menu Sub-menus are presented for changing the characteristics and values of the User Password, the Sy stem Administrator Password, the amount.
69 4 Summary of the HP/Phoenix BIOS Setup Program Power Menu The “Power” menu allows the user to set the standby delay . It also allows the sy stem administrator to decide whether the network, serial ports, mouse, or space bar are enabled as a means of reactivating the sy stem from Standby or Suspend .
70 4 Summary of the HP/Phoenix BIOS Power Saving and Erg onometry Power Saving and Ergonometry Power-On from Space-Bar The power -on from the space-bar function is enabled, provided that: • The computer is connected to a Windows 95 keyboard (recognizable by the Power-On icon on the space bar).
71 4 Summary of the HP/Phoenix BIOS Power Saving and Ergonometry The time-out period is the delay during which the power -down command can be cancelled (whilst the About to shut down Windows message is displayed on the screen).
72 4 Summary of the HP/Phoenix BIOS Power Saving and Erg onometry The network chip sends a signal over the External Start connector , where it is received by the special network remote power chip.
73 4 Summary of the HP/Phoenix BIOS Power Saving and Ergonometry Little Ben Little Ben is an HP application specific integrated circuit (ASIC), designed to be a companion to the Super I/O chip, that is connected between the chip-set and the processor .
74 4 Summary of the HP/Phoenix BIOS Power Saving and Erg onometry dog timer detects that the BIOS is inactive (and not reloading the timer once every 6 seconds), the computer is turned off without further BIOS acknowledgment. The following table summarizes the main signals that drive or are driven by the Little Ben chip.
75 4 Summary of the HP/Phoenix BIOS Power Saving and Ergonometry Advanced Power Management (APM) The BIOS is APM 1.2 compliant, providing it with facilities for advanced power mana gement (APM). APM is incorporated in Windows for W orkgroups 3.11, W indows 95 and OS/2, but not Windows NT .
76 4 Summary of the HP/Phoenix BIOS Power Saving and Erg onometry The following diagram gives a simplified view of the useful states that the computer can be in: the three On states ( Fully-On , Stand.
77 4 Summary of the HP/Phoenix BIOS Power Saving and Ergonometry The following diagram gives a more accurate, more detailed account of the valid state changes.
78 4 Summary of the HP/Phoenix BIOS Power Saving and Erg onometry Desktop Management Interface (DMI) HP T opTOOLS 2 is an integrated, easy-to-use desktop management application for efficient inventory , configuration, fault and security management. It is fully DMI compliant.
79 4 Summary of the HP/Phoenix BIOS BIOS Addresses BIOS Addresses This section provides a summary of the main features of the HP sy stem BIOS. This is software that provides an interface between the computer hardware and the operating sy stem.
80 4 Summary of the HP/Phoenix BIOS BIOS Addresses HP I/O Port Map (I/O Addresses Used by the System 1 ) Peripheral devices, accessory devices and sy stem controllers are accessed via the sy stem I/O space, which is not located in sy stem memory space.
81 4 Summary of the HP/Phoenix BIOS BIOS Addresses 0220h - 022Fh Audio interface 1 (Soundblaster) 0240h - 024Fh Audio interface 2 (Soundblaster) 0260h - 026Fh Audio interface 3 (Soundblaster) 0278h - .
82 4 Summary of the HP/Phoenix BIOS BIOS Addresses DMA Channel Controllers Only “I/O-to-memory” and “memory-to-I/O” transfers are allowed. “I/O-to-I/O” and “memory-to-memory” transfers are disallowed by the hardware configuration.
83 4 Summary of the HP/Phoenix BIOS BIOS Addresses Using the Setup program: • IRQ3 can be made available by disabling serial ports 2 and 4. • IRQ4 can be made available by disabling serial ports 1 and 3. • IRQ5 can be made available by disabling the parallel port 2.
84 4 Summary of the HP/Phoenix BIOS BIOS Addresses The PCI interrupt lines A, B, C and D are spread across the four inputs of the interrupt router (which is part of the PCI/ISA bridge, in the PIIX3 chip). Since most PCI devices are single-function, this allows for an even distribution of the lines.
85 5 Power-On Self-Test and Error Messages This chapter describes the Power -On Self-T est (POST) routines, which are contained in the computer’ s ROM BIOS, the error messages which can result, and the suggestions for corrective action.
86 5 Power-On Self-Test and Error Messages Order in Which the Tests are Performed Order in Which the Tests are Performed Each time the sy stem is powered on, or a reset is performed, the POST is executed. The POST process verifies the basic functionality of the sy stem components and initializes certain sy stem parameters.
87 5 Power-On Self-Test and Error Messages Order in Which the Tests are Performed Shadow the System ROM BIOS Tests the system ROM BIOS and shadows it. Failure to shadow the ROM BIOS will cause an error code to display. The boo t process will continu e, but the system will execute from R OM.
88 5 Power-On Self-Test and Error Messages Order in Which the Tests are Performed Protected Mode RAM Test (Extended RAM) Tests protected RAM in 64 KB segments above 1 MB . (This test is no t done during a reset using and ). Test failure causes an error code to display.
89 5 Power-On Self-Test and Error Messages Error Message Summary Error Message Summary The POST section of the HP BIOS no longer display s numeric error codes (such as 910B) but gives a self-explanatory , descriptive diagnosis, and a list of suggestions for corrective action.
90 5 Power-On Self-Test and Error Messages Beep Codes Beep Codes If a terminal error occurs during POST , the sy stem issues a beep code before attempting to display the error . Beep codes are useful for identifying the error when the sy stem is unable to display the error message.
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