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NI 5421 Specifications NI PXI/PCI-5421 16-Bit 100 MS/s Arbitrary Waveform Generator Unless otherwise noted, the followi ng conditions were used for each specification: • Analog Filter enabled. • Interpol ation set to maximum allo wed factor f or a gi v en sample r ate.
NI 5421 Specifications 2 ni.com CH 0 (Channel 0 Analog Output , Front Panel Connector) Table 1. Specif ication Va l u e Comments Number of Channels 1 — Connector SMB (jack) — Output Voltage Characteristics Output Paths 1. The software-selectable Ma in Output Path setting provides full-scale v oltages from 12.
© National Instruments Corpor ation 3 NI 5421 Specifications Amplitude and Of fset Amplitude Range Pat h Load Amplitude (V pk-pk ) 1. Amp litude values assume the full scale of the D A C is utilized. If an amplitude smaller than the minimu m va lu e i s desired, then wa veforms le ss than full scale of the D A C can be used.
NI 5421 Specifications 4 ni.com Maximum Output Voltage Maximum Output Vo l t a g e Pat h Load Maximum Output V oltage (V pk -pk ) The Max imum Output V oltage of the NI 5421 is determined by the Amplitude Range and the Of fset Range. Direct 50 Ω ±0.
© National Instruments Corpor ation 5 NI 5421 Specifications Output Coupling DC — Output Enable Software-selectable. When disabl ed, CH 0 out is terminated with a 1 W resistor with a value equal to the selected output impedance.
NI 5421 Specifications 6 ni.com Figure 1. Normalized Pas sband Flatness, Direct Path Figure 2. Pulse Response, Low-Gai n Amplifier Path 50 Ω Load 1.0M 10.0M 48.0M –10.0 –9.0 –6.0 –8.0 –5.0 –7.0 –3.0 –2.0 –1.0 0.0 1.0 2.0 F requency (Hz) dB –4.
© National Instruments Corpor ation 7 NI 5421 Specifications Table 1. (Continued) Specification Va l u e Comments Suggested Maximum Frequencies for Common Funct ions Function Path Disable the Analog Filter and the Digital Interpolation Filter for S quare, Ramp, and T riangle.
NI 5421 Specifications 8 ni.com Spectral Characteristics (Continued) Spurious-Free Dynamic Range (SFDR) with Harmonics Path Amplitude –1 dBFS. Measured from DC to 50 MHz. Also called harmonic distortion. SFDR with harmonics at low amplitudes is limited by a –148 dBm/Hz noise floor .
© National Instruments Corpor ation 9 NI 5421 Specifications Spectral Characteristics (Continued) 0 º C to 40 º C T otal Harmonic Distortion (THD) Path Amplitude –1 dBFS.
NI 5421 Specification s 10 ni.com A verage Noise Density Pat h Amplitude Range A verage Noise Density A verage Noise Density at small amplitudes is limited by a –148 dBm/Hz noise floor . V pk-pk dBm dBm/Hz dBFS/ Hz Direct 1 4.0 18 –142 –146.0 Lo w Gain 0.
© National Instruments Corpor ation 11 NI 5421 Specifications Figure 3. 10 MHz Single-T one Spectrum , Direct Path, 100 MS/s, Interpolation Factor S et to 4 Note The noise floor in Figure 3 is lim ited by the measurement de vice. Refer to the Average Noise Density specif ication.
NI 5421 Specification s 12 ni.com Figur e 4. 10 MHz Single-T one Spectrum, Low -Gain Amplifier Path, 100 MS/s, Interpolation Factor Set to 4 Note The noise floor in Figure 4 is lim ited by the measurement de vice. Refer to the Average Noise Density specif ication.
© National Instruments Corpor ation 13 NI 5421 Specifications Figure 5. Direct Path, 2-T one Spectrum (T ypical) Note The noise floor in Figure 5 is lim ited by the measurement de vice. Refer to the Average Noise Density specif ication. 0.0 25.0M 50.
NI 5421 Specification s 14 ni.com Sample Clock Table 2. Specif ication Va l u e Comments Sources 1. Internal, Di vide-by- N ( N ≥ 1) 2. Internal, DDS-based, High-Resolution 3. External, CLK IN (SMB front panel connector) 4. External, DDC CLK IN (DIGIT AL D A T A & CONTR OL front panel conn ector) 5.
© National Instruments Corpor ation 15 NI 5421 Specifications Effective Sample Rate Sample Rate (MS/s) Interpolation Factor Ef fecti ve Sample Rate Ef fecti ve Sample Rate = (Interpolation Factor) * (Sample Rate) 10 S/s to 105 MS/s 1 (Off) 10 S/s to 105 MS/s 12.
NI 5421 Specification s 16 ni.com System Phase Noise and Jitter (10 MHz Carrier) Sample Clock Source System Phase Noise Density (dBc/Hz) Offset System Output Jitter (Integrated from 100 Hz to 100 kHz) 1. High- Resolution specifications increase as the Sample Rate is decreased.
© National Instruments Corpor ation 17 NI 5421 Specifications Onboard Clock (Internal VCXO) Sample Clock Exporting Exported Sample Clock Destinations 1. PFI<0..1> (SMB front panel connectors) 2. DDC CLK OUT (DIGIT AL D A T A & CONTR OL front panel connector) 3.
NI 5421 Specification s 18 ni.com Phase-Locked Loop (PLL) Reference Clock Table 4. Specif ication Va l u e Comments Sources 1. NI PXI-5421 —PXI_CLK10 (backplane connector) NI PCI-5421 —R TSI_7 (R TSI_CLK) 2. CLK IN (SMB fro nt panel connector) The PLL Reference Clock provides the reference frequenc y for the phase-locked loop.
© National Instruments Corpor ation 19 NI 5421 Specifications CLK IN (Sample Clock and Reference Cloc k Input, Front Panel Connector) Table 5. Specif ication Va l u e Comments Connector SMB (jack) — Direction Input — Destinations 1. Sample Clock 2.
NI 5421 Specification s 20 ni.com PFI 0 and PFI 1 (Programmable Function Interfac e, Front Panel Connectors) Table 6. Specif ication Va l u e Comments Connectors T wo SMB (jack) — Direction Bi-directional — Frequenc y Range DC to 105 MHz — As an Input (Trigger) Destinations Start T rigger — Maximum Input Overload –2 V to +7 V — V IH 2.
© National Instruments Corpor ation 21 NI 5421 Specifications V OH Minimum: 2.9 V (open load), 1.4 V (50 Ω load) Output driv ers are +3.3 V TTL compatible. Measured with a 1 m cable. V OL Maximum: 0.2 V (open load), 0.2 V (50 Ω load) Rise/F all T ime (20% to 80%) ≤ 2.
NI 5421 Specification s 22 ni.com DIGIT AL DA T A & CONTROL (DDC) Optional Front Panel Connector Table 7. Specif ication Va l u e Comments Connector T ype 68-pin VHDCI female receptacle — Number of Data Output Signals 16 — Control Signals 1. DDC CLK OUT (clock output) 2.
© National Instruments Corpor ation 23 NI 5421 Specifications Output Signal Characteristics (Continued) Output Skew T ypical: 1 ns, maxim um 2 ns. Ske w between any two outp uts on the DIGIT AL DA T A & CONTR OL front panel connector .
NI 5421 Specification s 24 ni.com Start T rigger DDC CLK IN Clocking For ma t DDC Data Output signals change on the rising edge of DDC CLK IN. — Frequenc y Range 10 Hz to 105 MHz — Input Duty Cycle T olerance 40% to 60% — Input Jitter T olerances 300 ps pk-pk of Cycle-Cycle Jitter, and 1 ns rms of Period Jitter .
© National Instruments Corpor ation 25 NI 5421 Specifications Delay from Start T rigger to CH 0 Analog Output Interpolation Factor T ypical Delay Refer to t s2 at NI Signal Generators Help»Devices» NI 5421» NI <bus>-5421» Triggering» Trigger Timing .
NI 5421 Specification s 26 ni.com Markers Table 9. Specif ication Va l u e Comments Destinations 1. PFI<0..1> (SMB front panel connectors) 2. PFI<4..5> (DIGIT AL D A T A & CON TR OL front panel connector) 3. NI PXI-5421 —PXI_T rig<0.
© National Instruments Corpor ation 27 NI 5421 Specifications W aveform and Instruction Memor y Utilization Table 10. Specif ication Va l u e Comments Memory Usage The NI 5421 uses the Synchronization and Memory Core (SMC) technology in which wav eforms and instructions share onboard memory .
NI 5421 Specification s 28 ni.com Loop Count 1 to 16,777,21 5. Burst trigger: Unlimited — Quantum W aveform size must be an integer multiple of four samp les. — Memory Limits 8 MB Standard 32 MB Optio n 256 MB Option All trigger modes except where noted.
© National Instruments Corpor ation 29 NI 5421 Specifications Calibration Power Table 11. Specif ication Va l u e Comments Self-Calibrati on An onboard, 24-bit ADC and precision voltage reference are used to calibrate the DC gain and offset.
NI 5421 Specification s 30 ni.com Software Table 13. Specif ication Va l u e Comments Dri ver Software NI-FGEN 2.0 or later ve rsion. NI-FGEN is an IVI-compliant driv er that all o ws you to configure, control, and calibrate the NI 5421. NI -FGEN prov ides application programming interfaces fo r man y de velopment en vironment s.
© National Instruments Corpor ation 31 NI 5421 Specifications Environment NI PXI-5421 Environment Note T o ensure that the NI PXI-5421 cools ef fectively , follo w the guidelines in the Maintain Forced-Air Cooling Note to Users incl uded in the NI 542 1 kit.
NI 5421 Specification s 32 ni.com NI PCI-5421 Environment Note T o ensure that the NI PCI-5421 cools ef fectively , follo w the guidelines in the Maintain Forced -Air Cooling Note to Users included in the NI 5421 kit. Also, to maximize airflo w and extend the life of the de vice, lea ve any adjacent PCI slots empty .
© National Instruments Corpor ation 33 NI 5421 Specifications Safety , Electromagnetic Compatibility , and CE Compliance Table 16. Specification Va l u e Comments Safety The NI 5421 is designed to me.
NI 5421 Specification s 34 ni.com Physical Table 17. Specif ication Va l u e Comments Dimensions NI PXI-5421 NI PCI-5421 — 3U, One Slot, PXI/cPCI Module 2.0 × 13.0 × 21.6 cm (0.8 × 5.1 × 8.5 inches) 34.07 × 10.67 × 2.03 cm (13.4 × 4.20 × 0.8 inches) We i g h t 345 g (12.
© National Instruments Corpor ation 35 NI 5421 Specifications NI PXI-5421 Only—Front Panel LED Indicators Label Function For more informat ion, refer to the NI Sig nal Generators Help. A CCESS LED The A C CESS LED indicates the status of the PCI b us and the interface from the NI 5421 to the controller .
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