Benutzeranleitung / Produktwartung RC5050 des Produzenten Fairchild
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Application Note 50 Implementing the RC5050 and RC5051 DC-DC Conver ters on Pentium ® Pr o Motherboar ds www .fair childsemi.com Intr oduction This document describes how to implement a switching v o.
AN50 APPLICATION NOTE 2 T able 2. Intel Pentium Pr o and OverDrive ® Processor P ower Specifications Notes: 1. Maximum power values are measured at typical V CC P to take into account the thermal time constant of the CPU package. 2. Flexible motherboard specifications are recommendations only.
APPLICATION NOTE AN50 3 I/O Controls In addition to the V oltage Identification, there are sev eral sig- nals that control the DC-DC con verter or provide feedback from the DC-DC con verter to the CPU. They are Po wer- Good (PWRGD), Output Enable (OUTEN), and Upgrade Present (UP#).
AN50 APPLICATION NOTE 4 The HIDR V driver has a po wer supply , VCCQP , supplied from a 12V source as illustrated in Figure 2. The resulting voltage is suf ficient to provide the gate to source voltage to the external MOSFET that is required to achie ve a low R DS,ON .
APPLICATION NOTE AN50 5 Short Circuit Protection A current sense methodology is implemented to disable the output driv e signal to the MOSFET(s) when an over-current condition is detected. The v oltage drop created by the output current flowing across a sense resistor is presented to an internal comparator .
AN50 APPLICATION NOTE 6 Figure 4. Synchronous DC-DC Converter Application Schematic Using the RC5051 VO GND VID3 VID2 VID1 VID0 8 7 6 5 4 3 2 1 9 10 11 12 13 14 15 16 17 18 19 20 +5V PWRGD RC5051 VCC ENABLE C10 0.1 µ F C11 0.1 µ F 10K C EXT C7 0.1 µ F C6 4.
APPLICATION NOTE AN50 7 MOSFET Selection Cosiderations MOSFET Selection This application requires N-channel Logic Lev el Enhance- ment Mode Field Effect Transistors. Desired characteristics are as follows: • Low Static Drain-Source On-Resistance, R DS,ON < 37 m Ω (lower is better) • Low g ate driv e voltage, V GS ≤ 4.
AN50 APPLICATION NOTE 8 T wo MOSFETs in parallel. W e recommend two MOSFETs used in parallel instead of one single MOSFET . The following significant adv antages are realized using two MOSFETs in parallel: • Significant reduction of P ower dissipation .
APPLICATION NOTE AN50 9 Con ver ter Efficiency Losses due to parasitic resistance in the switches, coil, and sense resistor dominate at high load-current lev el.
AN50 APPLICATION NOTE 10 Selecting the Inductor The inductor is one of the most critical components to be selected for a DC-DC con verter application. The critical parameters are inductance (L), maximum DC current (I O ), and DC coil resistance (R l ).
APPLICATION NOTE AN50 11 Therefore, for load current of 14.5A, the peak current through the inductor , I pk , is found to be approximately 15.5A: Therefore, the short circuit detection threshold must be at least 16.5A. The next step is to determine the v alue of the sense resistor .
AN50 APPLICATION NOTE 12 Embedded Sense Resistor (PC T race Resistor) Embedded PC trace resistors hav e the advantage of near zero cost implementation.
APPLICATION NOTE AN50 13 tion. The embedded sense resistor allows the user to choose a plus or a minus delta resistance tap to offset an y large sheet resisti vity change. In this design, the center tap yields 6m Ω , the left tap yields 6.7m Ω , and the right tap yields 5.
AN50 APPLICATION NOTE 14 Figure 13A. V CCQP Output Waveform for Normal Operation Condition with V out = 3.3V@10A Figure 13B. V CCQP Output Waveform for Output Shorted to Ground Power dissipation on the Schottk y diode during a short cir- cuit condition must also be considered.
APPLICATION NOTE AN50 15 FET . Low Equi valent Series Resistance (ESR) capacitors are best suited for this type of application. Incorrect selection can hinder the con verter's overall performance. The input capacitor should be placed as close to the drain of the FET as possible to reduce the effect of ringing caused by long trace lengths.
AN50 APPLICATION NOTE 16 PCB La yout Guidelines and Considerations PCB Lay out Guidelines • Placement of the MOSFETs relativ e to the RC5050 is critical. Place the MOSFETs (M1 & M2) so that the trace length of the HIDR V pin from the RC5050 to the FET gates is minimized.
APPLICATION NOTE AN50 17 In general, all of the noisy switching lines should be kept aw ay from the quiet analog section of the RC5050. That is, traces that connect to pins 12 and 13 (HIDR V and VCCQP) should be kept far a way from the traces that con- nect to pins 1 through 5, and pin 16.
AN50 APPLICATION NOTE 18 Guidelines f or Debug ging and P erformance Ev aluations Debug ging Y our First Design Implementation 1. Note the setting of the VID pins to kno w what voltage is to be expected.
APPLICATION NOTE AN50 19 Note: Load regulation is expected to be typically around 0.8%. The load regulation performance for this device under evaluation is excellent. Output V oltag e Load T ransients Due to Load Current Step This test is performed using Intel P6.
AN50 APPLICATION NOTE 20 Input Ripple and P ower on Input Rush Current Note: Excellent input ripple voltage. Input ripple voltage is recom- mended to be less than 5% of the output voltage.
APPLICATION NOTE AN50 21 Attachment C Attachment D Attachment E Attachment F Attachment G.
AN50 APPLICATION NOTE 22 Summary This application note cov ers many aspects of the RC5050 and RC5051 for implementation of a DC-DC con verter a on Pentium Pro motherboard.
APPLICATION NOTE AN50 23 Appendix A Directory of Component Suppliers Dale Electronics, Inc. E. Hwy . 50, PO Box 180 Y ankton, SD 57078-0180 PH: (605) 665-9301 Fuji Electric Collmer Semiconductor Inc.
AN50 APPLICATION NOTE 2/98 0.0m Stock#AN30000050 1998 Fairchild Semiconductor Corporation LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION.
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