Benutzeranleitung / Produktwartung SS 08 des Produzenten Vodafone
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Vodafone Chair Mobile Co mmunications Systems, Pr of. Dr.-Ing. G. Fettweis chair Digital Signal Transmission Lab SS 08 Oliver Arnold Steffen Kunze.
TU Dresden, 4/29/2008 Slide 2 chair Introduction Hardware Why to use digital signal processing? General introduction to DSPs The TMS320C6711 DSP Architecture Overview Periphera.
TU Dresden, 4/29/2008 Slide 3 chair Hardware.
TU Dresden, 4/29/2008 Slide 4 chair Digital Signal Processing (DSP) Consumer Audio Stereo A/D, D/A PLL Mixers Multimedia Stereo audio Imaging Graphics palette Voltage regul.
TU Dresden, 4/29/2008 Slide 5 chair System Considerations Performance Performance Interfacing Interfacing Power Power Size Size Ease Ease - - of Use of Use • • Programming Programming • • Inte.
TU Dresden, 4/29/2008 Slide 6 chair Why Go Digital? Digital signal processing techniques are now so powerful that sometimes it is extremely difficult, if not impossible, for analogue signal processing to achieve similar performance.
TU Dresden, 4/29/2008 Slide 7 chair Why Go Digital? Analogue signal processing is achieved by using analogue components such as: Resistors Capacitors Inductors The inherent toleran.
TU Dresden, 4/29/2008 Slide 8 chair Why Go Digital? With DSP? - It is easy to: Change applications Correct applications Update applications Additionally DSPs reduce: Noise susc.
TU Dresden, 4/29/2008 Slide 9 chair General Introduction to DSPs.
TU Dresden, 4/29/2008 Slide 10 chair What Problem Are We Trying To Solve? Digital sampling of an analog signal: A t Most DSP algorithms can be expressed as: count i = 1 Y = Σ a i * x i for (i = 1; i .
TU Dresden, 4/29/2008 Slide 11 chair What are the typical DSP algorithms? The Sum of Products (SOP) is the key element in most DSP algorithms: 0 () ( ) M k k yn a xn k = = − ∑ ∑ ∑ = = − .
TU Dresden, 4/29/2008 Slide 12 chair Use a DSP processor when the following are required: Cost saving Smaller size Low power consumption Processing of many “high” frequency sig.
TU Dresden, 4/29/2008 Slide 13 chair Hardware vs. Microcode multiplication DSP processors are optimized to perform multiplication and addition operations. Multiplication and addition are done in hardware and in one cycle. Example: 4-bit multiply (unsigned).
TU Dresden, 4/29/2008 Slide 14 chair General Purpose DSP vs. DSP in ASIC Application Specific Integrated Circuits ( ASIC s) are semiconductors designed for dedicated functions .
TU Dresden, 4/29/2008 Slide 15 chair Floating vs. Fixed point processors Applications which require: High precision Wide dynamic range High signal-to-noise ratio Ease of use Î Nee.
TU Dresden, 4/29/2008 Slide 16 chair TMS320C6711 Architectural Overview.
TU Dresden, 4/29/2008 Slide 17 chair General DSP System Block Diagram P E R I P H E R A L S Central Processing Unit Internal Memory Internal Buses External Memory.
TU Dresden, 4/29/2008 Slide 18 chair ‘6711 CPU Overview Specification Clock Rate: 100/150 MHz Î 600/900 MFLOPS 0.18- μ m/5-Level Metal Process – CMOS Technology CPU has got two D.
TU Dresden, 4/29/2008 Slide 19 chair ‘6711 CPU Overview VelociTI Î advanced very-long instruction words ( VLIW ) Program Memory Width is 256 Bit Up to 8 32-Bit instructions c an be exec.
TU Dresden, 4/29/2008 Slide 20 chair Functional Block and CPU Diagram.
TU Dresden, 4/29/2008 Slide 21 chair A ‘6711 Datapath .S & .L Arithmetic, Logical & Branch functions .M Multiply, Rotation, Bit expansion .
TU Dresden, 4/29/2008 Slide 22 chair Functional Units and Operations Performed.
TU Dresden, 4/29/2008 Slide 23 chair C6700: Instruction Set .L .L .L .D .D .D .S .S .S .M .M .M No Unit Used IDLE IDLE NOP NOP .S Unit .S Unit NEG NEG NOT NOT OR OR SET SET SHL SHL SHR SHR SSHL SSHL S.
TU Dresden, 4/29/2008 Slide 24 chair 'C6x System Block Diagram Internal Buses Internal Buses CPU CPU .D1 .D1 .M1 .M1 .L1 .L1 .S1 .S1 .D2 .D2 .M2 .
TU Dresden, 4/29/2008 Slide 25 chair ‘C6000 Internal Buses PC Program Addr x32 Program Data x256 DMA DMA Addr - Read x32 DMA Data - Read x32 DMA Addr - Write x32 DMA Data - Write x32 A regs B regs D.
TU Dresden, 4/29/2008 Slide 26 chair How are Peripherals Controlled? Control and configuration of internal peripherals is done by memory mapped control registers There is a separate memory map.
TU Dresden, 4/29/2008 Slide 27 chair ‘C6711 Memory Map Byte Address FFFF_FFFF 0000_0000 64K x 8 Internal (L2 cache) Internal Memory Unified (data or prog) 4 blocks - each can be RAM or cache On-chip Peripherals 0180_0000 External Memory Async (SRAM, ROM, etc.
TU Dresden, 4/29/2008 Slide 28 chair Memory Map FFFF_FFFF 0000_0000 64KB Internal (Progam or Data) On-chip Periph 0180_0000 256MB External 256MB External 8000_0000 9000_0000 A000_0000 B000_0000 256MB .
TU Dresden, 4/29/2008 Slide 29 chair Operands Operands can be 5-bit constants (or 16-bit in some special instruct.) 32-bit Registers 40-bit Registers 64-bit Registers A 40-bit .
TU Dresden, 4/29/2008 Slide 30 chair Conditional execution All instructions in each Functional Unit of both Data paths can be executed conditionally Only the Registers A1, A2, B0, B1, B2 can hold the condition Conditional Execution uses the Syntax [!condition] Instruction e.
TU Dresden, 4/29/2008 Slide 31 chair Branches Branches are required to realize loops and change the program flow Branches are very useful in conjunction with conditional execution There ar.
TU Dresden, 4/29/2008 Slide 32 chair Case 1: B .S1 label Relative branch. Label limited to +/- 2 20 offset . More on the Branch Instruction (1) With this processor all the instructions are encoded in a 32-bit. Therefore the label must have a dynamic range of less than 32-bit as the instruction B has to be coded.
TU Dresden, 4/29/2008 Slide 33 chair More on the Branch Instruction (2) By specifying a register as an operand instead of a label, it is possible to have an absolute branch. This will allow a dynamic range of 2 32 . Case 2: Case 2: B .
TU Dresden, 4/29/2008 Slide 34 chair Getting Data from the Memory All Instructions work exclusively on Registers The .D Units in the Data-Paths are used to load and store the required Data fro.
TU Dresden, 4/29/2008 Slide 35 chair Addressing Modes There are two addressing modes supported: Linear Addressing Circular Addressing (e.g. Convolution) Circular Addressing supports block sizes 2 N Only the lower N bits of the Address are modified by address arithmetic.
TU Dresden, 4/29/2008 Slide 36 chair Floating vs. Fixed point processors Fixed point arithmetic 16-bit (integer or fractional) Signed or unsigned Floating point arithmetic 32-bit single precision 64-bit single precision Using signed and unsigned integers: Multiplication overflow.
TU Dresden, 4/29/2008 Slide 37 chair C6000 C Data Types Type Type Size Size Representation Representation char, signed char char, signed char 8 bits 8 bits ASCII ASCII unsigned char unsigned char 8 bi.
TU Dresden, 4/29/2008 Slide 38 chair Numerical Issues - Useful Tips Multiply by 2: Use shift left Divide by 2: Use shift right Log 2 N: Use shift Sine, Cosine, Log: Use look up tables To convert a fractional number to hex: Num x 2 15 Then convert to hex e.
TU Dresden, 4/29/2008 Slide 39 chair Numerical Issues - 32-bit Multiplication It is possible to perform 32-bit multiplication using 16-bit multipliers.
TU Dresden, 4/29/2008 Slide 40 chair Selected ‘6711 Peripherals.
TU Dresden, 4/29/2008 Slide 41 chair C6000 Peripherals .D1 .D1 .M1 .M1 .L1 .L1 .S1 .S1 .D2 .D2 .M2 .M2 .L2 .L2 .S2 .S2 Regs Regs (B0 (B0 - - B15/31) B15/31) Regs Regs (A0 (A0 - - A15/31) A15/31) CPU C.
TU Dresden, 4/29/2008 Slide 42 chair The McBSP Multichannel Buffered Serial Port Up to 100 Mb/sec performance 2 (or 3) full-duplex, synchronous serial-ports Enables direct interfacing .
TU Dresden, 4/29/2008 Slide 43 chair PCM3003 MONOLITHIC 20-BIT DS ADC AND DAC 16-/20-BIT INPUT/OUTPUT DATA HARDWARE CONTROL: PCM3003 STEREO ADC: SNR: 90dB & DynamicRange: 90dB .
TU Dresden, 4/29/2008 Slide 44 chair What is the bootloader? When the DSP is NOT powered or under reset the internal program memory is in a random state.
TU Dresden, 4/29/2008 Slide 45 chair What is the bootloader? When the DSP is powered and the CPU is taken out of reset the internal memory is still in a random state and the program will start running for address zero.
TU Dresden, 4/29/2008 Slide 46 chair What is the bootloader? With the boot, a portion of code can be automatically copied from external to internal memory.
TU Dresden, 4/29/2008 Slide 47 chair Interrupts DSPs must be able to execute tasks on asynchronous events Interrupts suspend the current processor task and save its context A interrupt ser.
TU Dresden, 4/29/2008 Slide 48 chair Interrupt Interrupt- and Thread Types HWI priorities set by hardware Î One ISR per interrupt 14 SWI priority levels Î Multiple SWIs at each level 15 .
TU Dresden, 4/29/2008 Slide 49 chair The DSK6711 Development Kit.
TU Dresden, 4/29/2008 Slide 50 chair DSK Contents Hardware 150 MHz ‘C6711 DSP TI 16-bit A/D Converter (‘AD535) External Memory 16M Bytes SDRAM 128K Bytes Flash ROM LED’s .
TU Dresden, 4/29/2008 Slide 51 chair C6711 DSK Overview 1.8V Power Supply 16M SDRAM 128K FLASH Daughter Card I/F (EMIF Connector) Parallel Port I/F Power Jack Power LED 3.
TU Dresden, 4/29/2008 Slide 52 chair Software: (4) PC Æ DSK Communications DSP DSP JTAG JTAG ....... ....... ....... ....... JTAG JTAG Emulation Emulation Port Port CCS uses parallel port to control .
TU Dresden, 4/29/2008 Slide 53 chair What happens to the Source-Code?.
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