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AT-MIO-16X User Manual Multifunction I/O Board for the PC AT/EISA October 1997 Edition Part Number 320640B-01 © Copyright 1992, 1997 National Instruments Corporation.
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Important Information Warranty The AT-MIO- 16X is warranted against defects in m aterials and w orkmanship for a period of one year f rom the date of shipment, as evidenced by receipts or other documentation. Nation al Instruments will, at its option, repair or replace equipment that proves to be defective during the warranty period.
© Nat ional Instru ments Corpor ation v AT-MIO -16X Us er Manua l Table of Cont ents About This M anual Organization of This Manual .............. ................. ................. ................. ................. ...... xv Conventions Used in This Manual.
T able of Contents AT-MIO-1 6X User Manu al vi © Natio nal Inst rument s Corporati on Analog Output Reference Selection ................ ................. ................. ............. 2-11 Analog Output Polarity Selection .. ................. ....
T able of Contents © Nat ional Instru ments Corpor ation vii AT-MIO -16X Us er Manua l Chapter 3 Theory of Operation Functional Overview................ ................. ................. ................. ................. ................. 3-1 PC I/O Channel Interface Circuitry .
T able of Contents AT-MIO-1 6X User Manu al viii © Natio nal Inst rument s Corporati on Command Regis ter 3 ............. ................. ................ ................. ........ 4-13 Command Regis ter 4 ............. ................. .........
T able of Contents © Nat ional Instru ments Corpor ation ix AT-M IO-16X Us er Manua l Chapter 5 Progra mming Register Prog ramming Considerations .............. ................ ................. ............ 5-1 Resource Allocation Considerations ..
T able of Contents AT-MIO-1 6X User Manu al x © Natio nal Inst rument s Corporati on RTSI Switch Signal Conn ection Considerations...................... ................. ................. .. 5-38 Programming th e RTSI Switch ......... ..............
T able of Contents © Nat ional Instru ments Corpor ation xi AT-M IO-16X Us er Manua l Figure 2-5. AT-MIO-16 X 68-Pin I/O Connecto r ............. ...... ................. ................. 2-16 Figure 2-6. AT- MIO-16X PGIA ................ ..........
T able of Contents AT-MIO-1 6X User Manu al xii © Natio nal Inst rument s Corporati on Figure 5-7. C yclic Waveform Programmin g .................. ................ ................. ........ 5-27 Figure 5-8. Pro grammed Cycle Wavefor m Programming .
T able of Contents © Nat ional Instru ments Corpor ation xiii AT-M IO-16X User Ma nual Table A-1. Equivalent Offset Errors in 16-Bit Systems ................... ................. ...... A-3 Table A-2. Equivalen t Gain Errors in 16-B it Systems ......
© Nati onal Instrum ents Corporat ion xv A T- MIO-16X User Manual About This Manual This m anual desc ribes the mechanica l and elec trical asp ects of th e AT-MIO- 16X board and contains information con cerning its op eration and p rogra mm ing.
About This Ma nual AT-MIO-16X User Manual xv i © Natio nal Inst rument s Corporati on • Appendix C, AMD Am9513A Data Sheet , contains the manufa cturer d ata sh ee t for the AM D Am95 13A System Ti ming Controller integrated circ uit (Advanced Micro Devices, Inc.
About This Ma nual © Nati onal Instrum ents Corporat ion xvii A T- MIO-16X User Manual Related Documentation The follow ing document co ntains informat ion that you may find h elpful as you read this.
© Nati onal Instrum ents Corporat ion 1-1 A T- MIO-16X User Manual Chapter 1 Introduction This chapter describes the AT-M IO-16X, lists the contents of your AT-MIO- 16X kit, the option al softwa re, and optiona l equipment, and explain s how to unpack the A T-MIO -16X.
Chapter 1 Int roduction AT-MIO-16X User Manual 1 -2 © Natio nal Inst rument s Corporati on signals for communication and control. SCXI is the instrumentation front end for plug -in DAQ b oards . Analog Inpu t The AT -MIO- 16X is a hi gh-perform ance m ultifunction an alog, d igital, and timin g I/O bo ard f or the PC .
Chap ter 1 Int rodu ction © Nati onal Instrum ents Corporat ion 1-3 A T- MIO-16X User Manual Digita l and Tim ing I/O In addition to the a nalog input and analog output ca pabilities of the AT-MIO-16.
Chapter 1 Int roduction AT-MIO-16X User Manual 1 -4 © Natio nal Inst rument s Corporati on ❑ AT-MIO-1 6X U ser Man ual ❑ One of the fo llowing software packages and d ocumentation: Componen tWork.
Chap ter 1 Int rodu ction © Nati onal Instrum ents Corporat ion 1-5 A T- MIO-16X User Manual VirtualBen ch featu res virtual instrum ents that com bine DAQ produc ts, softwar e, and your com puter to creat e a stand-alone in strument with the added benefit of the processing, display, and storage capabilitie s of your com puter.
Chapter 1 Int roduction AT-MIO-16X User Manual 1 -6 © Natio nal Inst rument s Corporati on Figu re 1-1. The Relation ship bet ween th e Programmi ng Environ ment, NI-DAQ, and Your Hardware Register-Leve l Programmi ng The fi nal opt ion fo r program ming an y Nation al Inst rument s DAQ hardwa re i s to wr ite r eg iste r- lev el soft wa re .
Chap ter 1 Int rodu ction © Nati onal Instrum ents Corporat ion 1-7 A T- MIO-16X User Manual Optional Equipment National Instru ments offer s a v ari ety of pr oducts to u se with your AT-MIO- 16X bo.
© Nati onal Instrum ents Corporat ion 2-1 A T- MIO-16X User Manual Chapter 2 Configuration and Installation This chapter explains board configuration, installa tion of the AT-MIO-16X into the PC, signal connec tions to the AT-MIO- 16X, and cable considerations.
Chapter 2 Configura tion and I nstallatio n AT-MIO-16X User Manual 2 -2 © Natio nal Inst rument s Corporati on Figu re 2-2 . AT-MIO-16X wit h 68-Pin I/O Connector P arts Locator Diagram Board Configuration The AT-MI O-16X co ntains one D IP switch to configur e the base address selection for the AT bus interfa ce.
Chap ter 2 C onfig uration and I nstalla tion © Nati onal Instrum ents Corporat ion 2-3 A T- MIO-16X User Manual The PC d efi nes a ccesses to plug-in b oa rds to be I/O mappe d ac cesses within the I/O space of the computer. Locations are either written to or read from as byte s or words.
Chapter 2 Configura tion and I nstallatio n AT-MIO-16X User Manual 2 -4 © Natio nal Inst rument s Corporati on The base ad dress DIP switch is arranged so that a logical 1 or true stat e for the assoc iated addres s selection bit is selected by pushing the toggle switch up, or towa rd the top of the bo ard.
Chap ter 2 C onfig uration and I nstalla tion © Nati onal Instrum ents Corporat ion 2-5 A T- MIO-16X User Manual AT-MIO-64F-5 No ne* None * 220 hex GPIB-PCII Chann e l 1 Line 7 2B8 hex GPIB-PCIIA Cha.
Chapter 2 Configura tion and I nstallatio n AT-MIO-16X User Manual 2 -6 © Natio nal Inst rument s Corporati on 01110 1C0 1C0 - 1DF 0 1 1 1 1 1E0 1E0 - 1FF 1 0 0 0 0 200 200 - 21F 1 0 0 0 1 220 220 - .
Chap ter 2 C onfig uration and I nstalla tion © Nati onal Instrum ents Corporat ion 2-7 A T- MIO-16X User Manual Interrupt and DM A Channel Selectio n The base I/O address selec tion is the only resourc e on the AT-MIO- 16X board that must be se t manually before the board is placed into the PC.
Chapter 2 Configura tion and I nstallatio n AT-MIO-16X User Manual 2 -8 © Natio nal Inst rument s Corporati on While reading the followi ng paragraphs, you may find it helpful to refer to the Analo g Inpu t Sign al Conn ectio ns section lat er in this chapte r, which contains diag rams showing the signal paths for the three configura tions.
Chap ter 2 C onfig uration and I nstalla tion © Nati onal Instrum ents Corporat ion 2-9 A T- MIO-16X User Manual RSE Input (16 Channels) RSE inp ut means t hat all i nput signals are re ferenc ed to a c ommon ground po int that is also tied to the a nalog input gro und of the AT-MIO- 16X board .
Chapter 2 Configura tion and I nstallatio n AT-MIO-16X User Manual 2- 10 © Natio nal Inst rument s Corporati on • Multip lexer contro l is configured to control up to 16 input chan nels. Note : The NRSE input mode is the only mode in which the AI SENSE signa l from the I/O connector is used as an input.
Chap ter 2 C onfig uration and I nstalla tion © Nati onal Instrum ents Corporat ion 2-11 A T - MIO-16X User Manual Analog Output Configuration The AT-MI O-16X supp lies two channe ls of analog outp ut voltage at the I/O connector. The ana log output circuitry is c onfigurable through program ming of a regis ter in the boa rd regis ter set.
Chapter 2 Configura tion and I nstallatio n AT-MIO-16X User Manual 2- 12 © Natio nal Inst rument s Corporati on Analog O utput Po larity Sele ction Each ana log ou tput c hann el ca n be c onfig ured fo r either unipo lar or bipolar output. A un ipolar configu ration has a rang e of 0 to V ref at the analog o utput.
Chap ter 2 C onfig uration and I nstalla tion © Nati onal Instrum ents Corporat ion 2-13 A T - MIO-16X User Manual The AT-M IO-16X can use either its internal 10-MHz timebase, or it can use a timeb ase receive d over the RT SI bus.
Chapter 2 Configura tion and I nstallatio n AT-MIO-16X User Manual 2- 14 © Natio nal Inst rument s Corporati on Signal Connections This section describe s input and output signal conn ections to the AT-MIO- 16X board via the AT-MI O-16X I/O conn ector.
Chap ter 2 C onfig uration and I nstalla tion © Nati onal Instrum ents Corporat ion 2-15 A T - MIO-16X User Manual Figure 2-4 shows the pin assig nments for the AT -M IO-16X 50-pin I/O conn ector.
Chapter 2 Configura tion and I nstallatio n AT-MIO-16X User Manual 2- 16 © Natio nal Inst rument s Corporati on Figure 2-5 shows the pin assig nments for the AT-M IO-16X 68- pin I/O conn ector.
Chap ter 2 C onfig uration and I nstalla tion © Nati onal Instrum ents Corporat ion 2-17 A T - MIO-16X User Manual Signal Connect ion Descriptions Signal Names Reference Descrip tions AI GND N/A Anal.
Chapter 2 Configura tion and I nstallatio n AT-MIO-16X User Manual 2- 18 © Natio nal Inst rument s Corporati on SCANCLK DIG GND Scan Clock—This pi n pulses once for each A/D conversion in the scanning mod es. The low-to-high ed ge indicates when the input signal can b e removed from the in put or switched to another s ignal.
Chap ter 2 C onfig uration and I nstalla tion © Nati onal Instrum ents Corporat ion 2-19 A T - MIO-16X User Manual The sig nals on the conn ector c an be cla ssified a s analog input si gnals, analog o utput signals, digita l I/O signals, digita l power conn ections, or timing I/ O si gn als .
Chapter 2 Configura tion and I nstallatio n AT-MIO-16X User Manual 2- 20 © Natio nal Inst rument s Corporati on Figur e 2-6. AT-MIO-16X PGI A The AT-MI O-16X PGI A applies gain and co mmon-mod e voltage rejection, and presents high -input impedance to the analog input signals connected to the AT-MIO- 16X board.
Chap ter 2 C onfig uration and I nstalla tion © Nati onal Instrum ents Corporat ion 2-21 A T - MIO-16X User Manual Types of Signal Sources When config uring the input mode of the AT-MIO-1 6X and makin g signal connec tions, you mu st first determin e wheth er the signal sou rce is floating or g round- refe re nced .
Chapter 2 Configura tion and I nstallatio n AT-MIO-16X User Manual 2- 22 © Natio nal Inst rument s Corporati on Table 2- 5 summarizes the recommende d input config uration for both types of signal sources.
Chap ter 2 C onfig uration and I nstalla tion © Nati onal Instrum ents Corporat ion 2-23 A T - MIO-16X User Manual Differe ntial Co nnectio ns for Groun d-Referenced Signal So urces Figure 2-7 show s h ow to co nnec t a groun d-r efe renc ed signal s our ce to an AT- MIO-16X boa rd configur ed in the DIFF input mode .
Chapter 2 Configura tion and I nstallatio n AT-MIO-16X User Manual 2- 24 © Natio nal Inst rument s Corporati on Differe ntial Co nnectio ns for Nonre ferenced o r Floati ng Signal So urces Figure 2-8 shows h ow to co nnec t a floating sign al sour ce to a n AT-MIO- 16X board configured in the DIFF input mode.
Chap ter 2 C onfig uration and I nstalla tion © Nati onal Instrum ents Corporat ion 2-25 A T - MIO-16X User Manual connect the negative side of the signal to AI GND as well as to the negative (–) input of the PGIA. This works well for DC-coupled sources with low source impedan ce (less than 100 Ω ).
Chapter 2 Configura tion and I nstallatio n AT-MIO-16X User Manual 2- 26 © Natio nal Inst rument s Corporati on resistors. Fo r exam ple, if tw o 100- k Ω bias resi stors are used, there could be a s much as 2 00 µ V of inpu t of f s et v ol tag e ( 0.
Chap ter 2 C onfig uration and I nstalla tion © Nati onal Instrum ents Corporat ion 2-27 A T - MIO-16X User Manual and 15 are on pins 17 and 18, which are the farthest analo g inputs from AI GND.
Chapter 2 Configura tion and I nstallatio n AT-MIO-16X User Manual 2- 28 © Natio nal Inst rument s Corporati on Single-En ded Connectio ns for Grounded Signal Sources (NRSE Configura tion) If a gr ou.
Chap ter 2 C onfig uration and I nstalla tion © Nati onal Instrum ents Corporat ion 2-29 A T - MIO-16X User Manual Common-Mo de Signa l Rejection Consideration s Figures 2-7 and 2-8, located earlier in this chapter, show connections for signal sources th at are alrea dy refere nced to some ground point with respec t to the AT-MIO-16 X.
Chapter 2 Configura tion and I nstallatio n AT-MIO-16X User Manual 2- 30 © Natio nal Inst rument s Corporati on The follow ing r anges a nd ratings ap ply to the EX TR EF input: Normal input voltage .
Chap ter 2 C onfig uration and I nstalla tion © Nati onal Instrum ents Corporat ion 2-31 A T - MIO-16X User Manual Digita l I/O Signa l Connection s The digital lines ADIO<0..3> are connec ted to digital I/O port A. The digital lin es BDIO<0.
Chapter 2 Configura tion and I nstallatio n AT-MIO-16X User Manual 2- 32 © Natio nal Inst rument s Corporati on Figure 2-12. Dig ital I/O Connecti ons In Figure 2-12, port A is configur ed for digital outp ut, and port B is configured for digital input.
Chap ter 2 C onfig uration and I nstalla tion © Nati onal Instrum ents Corporat ion 2-33 A T - MIO-16X User Manual Caution: Under no c ircumstances should these +5-V power pins be direc tly connected to analog or digital g round or to any other vo ltage source on the AT-MIO- 16X or a ny other de vice.
Chapter 2 Configura tion and I nstallatio n AT-MIO-16X User Manual 2- 34 © Natio nal Inst rument s Corporati on EXTCONV* Signal A/D conver sions ca n be ext ernally trigger ed with the EXT CONV* pin . Applyin g an act ive low pulse to th e EXTCONV* signal i nitiates an A/D conversio n.
Chap ter 2 C onfig uration and I nstalla tion © Nati onal Instrum ents Corporat ion 2-35 A T - MIO-16X User Manual EXTTRIG* Signal Any data acquisition se quence can be initiated by an external trigger applied to the EX TTRIG* pin.
Chapter 2 Configura tion and I nstallatio n AT-MIO-16X User Manual 2- 36 © Natio nal Inst rument s Corporati on EXTGATE* Signal EXTGAT E* is an inpu t sign al use d for ha rd ware gating . EX TG AT E* contro ls A/D conve rsio n pulses. If EXT GAT E* is low, no A/D conversio n p ulses oc c ur fr om EXT CO NV* o r th e sample -inte rval counter.
Chap ter 2 C onfig uration and I nstalla tion © Nati onal Instrum ents Corporat ion 2-37 A T - MIO-16X User Manual Counter Signal Connections The gen eral-purpose timing signals include the G ATE and OUT signals for the Am 951 3A Co unte rs 1, 2, an d 5, SOU RC E sig nals fo r C ounters 1 and 5, and the FO U T signal ge nerated by the Am9513 A.
Chapter 2 Configura tion and I nstallatio n AT-MIO-16X User Manual 2- 38 © Natio nal Inst rument s Corporati on Figur e 2-17. Event-Counti ng Appl ication with Extern al Switch Gating To perf orm pulse -width me asure ment, a c oun ter is p rog ramm ed to be level gated.
Chap ter 2 C onfig uration and I nstalla tion © Nati onal Instrum ents Corporat ion 2-39 A T - MIO-16X User Manual To measur e frequen cy, a counte r is programme d to be level gated and the rising or falling edges a re counted in a signal applied to a SOURCE input.
Chapter 2 Configura tion and I nstallatio n AT-MIO-16X User Manual 2- 40 © Natio nal Inst rument s Corporati on The signa ls f or Cou nter s 1 , 2, a nd 5, a nd the FOU T outpu t sign al are directly tied from the A m 9513A input a nd ou tput p ins to the I/O connec tor.
Chap ter 2 C onfig uration and I nstalla tion © Nati onal Instrum ents Corporat ion 2-41 A T - MIO-16X User Manual Figure 2-19. G eneral-P urpose Ti ming Signa ls The G ATE and O UT signal tran sitions in Figure 2-17 are refere nced to the rising edge of the SOURCE sign al.
Chapter 2 Configura tion and I nstallatio n AT-MIO-16X User Manual 2- 42 © Natio nal Inst rument s Corporati on register in the AT -MIO -1 6X r eg ister set an d th en div ided by 10 . Th e default value is 1 M Hz into the Am 9513A (10-M Hz clock signal on the AT-MIO- 16X) .
Chap ter 2 C onfig uration and I nstalla tion © Nati onal Instrum ents Corporat ion 2-43 A T - MIO-16X User Manual You ca n minim ize n oise pic kup and ma ximize m easur emen t a ccur acy by doing th e following : • Use differ ential analog input conne ctions to reject comm on-mode noise.
Chapter 2 Configura tion and I nstallatio n AT-MIO-16X User Manual 2- 44 © Natio nal Inst rument s Corporati on The CB- 50 is use fu l fo r prot otyping a n ap plication or in s ituations where A T-MI O -16 X i nte rc onn ect ions ar e fr eq uent ly c ha ng ed .
© Nati onal Instrum ents Corporat ion 3-1 A T- MIO-16X User Manual Chapter 3 Theory of Operation This chapter contain s a func tional ov erview of the AT-MIO-1 6X and e xplains the oper ation of e ach func tional un it ma king up the AT-MIO -16X.
Chapter 3 T heory of O peration AT-MIO-16X User Manual 3 -2 © Natio nal Inst rument s Corporati on The following major compon ents make up the AT-MI O-16X boar d: • PC I/O channel interface circuit.
Chapter 3 Theor y of Op eration © Nati onal Instrum ents Corporat ion 3-3 A T- MIO-16X User Manual Figur e 3-2. PC I/O Channel I nterface Circui try Bloc k Diagram The PC I/O channel interface circui.
Chapter 3 T heory of O peration AT-MIO-16X User Manual 3 -4 © Natio nal Inst rument s Corporati on conflicts w ith a ny othe r e quipm ent in you r PC, you m ust chang e the base addre ss of the AT-MIO-16 X or of the other device. See Chapter 2, Configuration and Installation , for more info rmation.
Chapter 3 Theor y of Op eration © Nati onal Instrum ents Corporat ion 3-5 A T- MIO-16X User Manual select ed for DMA transfer . These DMA ch annels are select able from one of the registe rs in the AT -MIO -16X r egister set.
Chapter 3 T heory of O peration AT-MIO-16X User Manual 3 -6 © Natio nal Inst rument s Corporati on Analog Inpu t Circuitry The analog input circuitry consists of an input multiplexer, multiplexer-mode select ion circuitry, a PG IA, calibration cir cuitry, a 16- bit samp ling AD C, a nd a 1 6-b it, 5 12- word de ep FIFO.
Chapter 3 Theor y of Op eration © Nati onal Instrum ents Corporat ion 3-7 A T- MIO-16X User Manual input of the PGIA in single -ended mode is conn ected to either the input ground or th e AI SE NS E signa l a t the I /O c onnec tor depe nding o n the nature of the inpu t signals.
Chapter 3 T heory of O peration AT-MIO-16X User Manual 3 -8 © Natio nal Inst rument s Corporati on bipolar modes, and these valu es are also permanen tly stored in the EEPROM.
Chapter 3 Theor y of Op eration © Nati onal Instrum ents Corporat ion 3-9 A T- MIO-16X User Manual When the ADC value i s shifted into the AD C FIFO buffer by FIFO_LD*, a si gnal is generated that indicat es valid data is available to be read. Single conve rsion timing of th is type is appropr iate for reading channe l data on an ad ho c basis.
Chapter 3 T heory of O peration AT-MIO-16X User Manual 3- 10 © Natio nal Inst rument s Corporati on acquisition seque nce tha t e mpl oys ex ter nal co nve rsion tim ing, conversions are inhibited by.
Chapter 3 Theor y of Op eration © Nati onal Instrum ents Corporat ion 3-11 A T - MIO-16X User Manual In this seque nce, the sample-interval coun ter, Coun ter 3, is prog rammed to generate c onver sion signals o nly under a certain gating signa l, such as the DAQPROG signal.
Chapter 3 T heory of O peration AT-MIO-16X User Manual 3- 12 © Natio nal Inst rument s Corporati on the sample tim er is inde pe ndent of the ga ting signal, and for pretrigg er sequences, the sample timer is dependent on the gating signal.
Chapter 3 Theor y of Op eration © Nati onal Instrum ents Corporat ion 3-13 A T - MIO-16X User Manual Continuous Scann ing Data Acquisition Timing Continuous scanning data acqu isition uses the configur ation memory register to automatically se quence from one analog input channel setting to another during the data acquisition sequence.
Chapter 3 T heory of O peration AT-MIO-16X User Manual 3- 14 © Natio nal Inst rument s Corporati on Interval Sca nning Data Acquisitio n Timing Interval scan ning a ssigns a time betwe en the beginning of con sec utive scan se quenc es .
Chapter 3 Theor y of Op eration © Nati onal Instrum ents Corporat ion 3-15 A T - MIO-16X User Manual Data Acquisiti on Rates The acqu isition and chan nel selection ha rdware func tion so that in the.
Chapter 3 T heory of O peration AT-MIO-16X User Manual 3- 16 © Natio nal Inst rument s Corporati on Figu re 3-9. Analog Ou tput Circui try Block Di agram Analog Outp ut Circuitry Each a na lo g o u t.
Chapter 3 Theor y of Op eration © Nati onal Instrum ents Corporat ion 3-17 A T - MIO-16X User Manual The outpu t vo ltage is av aila ble on the AT -MIO -1 6X I /O conne ct or DAC0 O UT a nd DAC 1 O UT pins .
Chapter 3 T heory of O peration AT-MIO-16X User Manual 3- 18 © Natio nal Inst rument s Corporati on AT-MIO- 16X board c an b e reca librate d withou t e xterna l ha rdw are at any time u nder any number of different ope rating co nditions in orde r to remove errors c au s ed b y te mperatu r e dr if t a nd tim e.
Chapter 3 Theor y of Op eration © Nati onal Instrum ents Corporat ion 3-19 A T - MIO-16X User Manual Figu re 3- 10. Analog Output Waveform C ircui try The local latch is used for im mediate updating of the DACs.
Chapter 3 T heory of O peration AT-MIO-16X User Manual 3- 20 © Natio nal Inst rument s Corporati on latch concurre ntly or separately. In this instance, th e value written to the DAC through the local latch is not updated u ntil the update pulse trigger occurs.
Chapter 3 Theor y of Op eration © Nati onal Instrum ents Corporat ion 3-21 A T - MIO-16X User Manual In Figure 3-11, the update trigger signal ser ves to update the previo usly written value to the DAC. I n the posted update mode, the DAC FIFO is used to bu f fe r th e dat a.
Chapter 3 T heory of O peration AT-MIO-16X User Manual 3- 22 © Natio nal Inst rument s Corporati on continuous wave form. The adv antage of having the data in the DAC FIFO is that the FIFO ne ve r n eeds to have th e da ta re fr esh ed , theref o re it is ne ver empty.
Chapter 3 Theor y of Op eration © Nati onal Instrum ents Corporat ion 3-23 A T - MIO-16X User Manual FIFO Programm ed Cyclic Waveform Gen eration One step beyon d the cont inuou s wavefo rm gene ratio n is the programmed cyclic waveform genera tion. This mode is also available only when the entire buffer fits within the DAC FIFO.
Chapter 3 T heory of O peration AT-MIO-16X User Manual 3- 24 © Natio nal Inst rument s Corporati on In the pulsed wave form applica tion, Counte r 1 of the Am9513A is programmed to count the number o f retransmit signals, before termin ati ng t he sequ en ce .
Chapter 3 Theor y of Op eration © Nati onal Instrum ents Corporat ion 3-25 A T - MIO-16X User Manual The digital I/O lines a re controlle d by th e D igital Ou tput R egister an d monitored by the Digital I n put Regi ster. The Digital Output Registe r is an 8-bit re gister that conta ins th e di gital output v alues for both ports 0 and 1.
Chapter 3 T heory of O peration AT-MIO-16X User Manual 3- 26 © Natio nal Inst rument s Corporati on Figur e 3-17. Timing I/O Circuitry Block Diagr am The Am9513A contains five independent 16-bit counter/timer s, a 4-bit fre que nc y outp ut chan nel , and fiv e in ter nal ly ge ne ra ted t ime bas es.
Chapter 3 Theor y of Op eration © Nati onal Instrum ents Corporat ion 3-27 A T - MIO-16X User Manual Figu re 3-18. Counter Block Diagram Each counte r has a SOURCE inp ut pin, a GATE input pin , and an output pin labele d OU T.
Chapter 3 T heory of O peration AT-MIO-16X User Manual 3- 28 © Natio nal Inst rument s Corporati on counter applic ations, the counte r reloads from an interna l register whe n it reaches TC. In TC pu lse output mo de, the coun ter genera tes a pulse during the c ycle that it re aches TC an d reload s.
Chapter 3 Theor y of Op eration © Nati onal Instrum ents Corporat ion 3-29 A T - MIO-16X User Manual Counter 5 is sometimes used by the d ata acquisition timing circuitry and c oncatenate d with Counter 4 to form a 32-bit sam ple counter.
Chapter 3 T heory of O peration AT-MIO-16X User Manual 3- 30 © Natio nal Inst rument s Corporati on The RTSICLK line can be used to sour ce a 10-MHz signal ac ross the RTSI bus or to receive a nother clo ck signal from an other AT boa rd connect ed to the RTSI bus.
© Nati onal Instrum ents Corporat ion 4-1 A T- MIO-16X User Manual Chapter 4 Register Map and Descriptio ns This chapter describ es in detail the ad dress an d funct ion of e ach of the AT-MIO- 16X contro l and status registe rs.
Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 2 © Natio nal Inst rument s Corporati on Analog Output R egister Group DAC0 Register DAC1 Register 10 12 Write-only Write-only 16-b.
Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-3 A T- MIO-16X User Manual Register Sizes Two differ ent tran sfer sizes fo r read- and-wr ite opera tions are ava ilable on the PC: byte ( 8-b it) and w ord ( 16-bit).
Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 4 © Natio nal Inst rument s Corporati on Configuration a nd Status Regi ster Group The six regist ers ma king up the Conf igurat ion and S tatus R egister Group allow gen eral control an d monitoring of the AT-MIO-1 6X hardware .
Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-5 A T- MIO-16X User Manual Command R egister 1 Comm and Re gister 1 conta ins 11 bits that co ntrol AT-MIO- 16X se rial device access, and data a cquisition mode selection.
Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 6 © Natio nal Inst rument s Corporati on application of the appropriate load signal. 12 SCANDIV Scan Divide—This bit controls the configura tion memory sse quencing during sca nned data acq uisition.
Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-7 A T- MIO-16X User Manual thereby initiating a data acquisition operation. If DA QE N is cl eare d, software and hard war e trigge rs have n o effect . 7 SCAN EN S can En ab le —T hi s b it co nt ro ls multiple-channe l sca nning during d ata acqu is itio n.
Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 8 © Natio nal Inst rument s Corporati on concate nat ed w ith Co unte r 5 to contr ol conversio n cou nting. A 16- bit c ount mode c an be used if the numb er o f A/D sample conv ersions to be perf ormed is less than 6 5,537.
Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-9 A T- MIO-16X User Manual Command R egister 2 Command Re gister 2 contains 15 bits that control AT -MIO-16X RTSI bus transceiv ers, analog output configu ration, a nd DMA Channe ls A and B selec tion.
Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 10 © Natio nal Inst rument s Corporati on 13 A2RCV RTSI A2 Receive—This bit controls the driver that allo ws the G ATE1 s ignal to be driven from pin A2 of the RTSI switch. If A2RCV is set, pin A2 of the RTSI switch drives the GAT E1 signal.
Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-11 A T - MIO-16X User Manual 9 EXTRE FDAC1 Exter nal Refer ence for DAC 1—This bit contro ls the re ference se lectio n for DAC 1 in the a nalog ou tput se ctio n.
Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 12 © Natio nal Inst rument s Corporati on Tabl e 4-2. DM A Channe l Selectio n Bit P atte rn Effect Bit Pattern Effect DMACHAB2 DMA.
Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-13 A T - MIO-16X User Manual Command R egister 3 Command Register 3 c ontai ns 16 bits tha t con trol th e ADC link to the AT-DSP2200, digital I/O port, inter rupt and DM A modes, and interrupt channel selectio n.
Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 14 © Natio nal Inst rument s Corporati on 13 DIOPAEN Digital I/O Port A Enable—Thi s bit cont rols t he 4- bit di git al por t A. I f DIOPAEN is set, the Digital Output Register drive s the DI O<4.
Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-15 A T - MIO-16X User Manual data acquisition operation completes. The interrupt request is serviced by strobing the DAQ Clear Register. When DAQCMPLINT is clear ed, comp letion of a data acquisition sequence does not generate an interrupt.
Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 16 © Natio nal Inst rument s Corporati on 6 ADCREQ ADC Request Enable—This bit con trols DMA requesting an d interrupt genera tion f ro m an A /D c onver sio n. If this bit is set, an interrupt or DMA request is gene ra ted w he n an A /D conversion is available in the FIFO.
Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-17 A T - MIO-16X User Manual 011101 Channel A from AD C, Chann el B to DAC0 0 1 1 1 1 0 Channel A fr om ADC, Ch ann.
Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 18 © Natio nal Inst rument s Corporati on 5 DAC1RE Q D AC 1 Re quest E nable— This bit controls D MA requesting a nd interrup t generation from D/A updates. I f this bit is set, an interrupt or DMA request is generated when the DAC is ready to receive data.
Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-19 A T - MIO-16X User Manual Table 4-3 for av ailable m odes and ass ocia t ed b it pa tt ern s. 3 DRVAIS Drive Ana log In put Sens e—T his signa l contro ls th e AI SEN SE sign al at the I/O connect or.
Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 20 © Natio nal Inst rument s Corporati on Command R egister 4 Command Register 4 c ontai ns 16 bits tha t con trol th e AT-M IO- 16X board c loc k sele ction, s er ial DA C link o ve r th e RT SI bus, D AC m od e selection, a nd miscellaneous configuration bits.
Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-21 A T - MIO-16X User Manual 13 DAC1DSP DA C 1 DSP Link Enable—T his bit controls the serial link from the AT-DSP2200 to DAC 1 of the analog output section. If DAC1DSP is set, then the serial link is enabled.
Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 22 © Natio nal Inst rument s Corporati on update. If DACMB3 is set, the cir cuitry will determ ine w het her to pe rf orm one rea d or two read s from t he DAC FI FO depending o n the da ta in the FI FO.
Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-23 A T - MIO-16X User Manual Values can be directly written to the DAC, but not through the DAC FIFO. If DACGAT E is cl eare d, u pdatin g of an d writing to the DACs proceeds normally .
Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 24 © Natio nal Inst rument s Corporati on If SRC3SEL is set, Source 3 is connected to the DAC FI FO retransmit signal . In the FIFO prog rammed cy cle wavefo rm modes, this bit s hould be set so th e counte r can ac cess to the D AC FI FO retransmit signal.
Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-25 A T - MIO-16X User Manual Status Registe r 1 Status Register 1 c ontai ns 16 bits of AT -MIO -16X har dware statu s information, incl udin g in terrup t, a nal og inpu t status , an alog ou tput sta tus, an d data ac quisi tion pr ogr ess.
Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 26 © Natio nal Inst rument s Corporati on data acquisition operation has complete d.
Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-27 A T - MIO-16X User Manual until cleared by strobing the DMATCB Clear Register. 9 OVERFLOW Ove rflow—This bi t indicates whether the ADC FIFO has overflo wed during a sample run.
Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 28 © Natio nal Inst rument s Corporati on I/O modes, TMRREQ m ust be cleared by strob ing th e TM RR EQ C le ar Re gis ter . 6 DACCOMP DAC Seque nce Comple te—T his bit reflec ts the stat us of the DAC sequen ce termination cir cuitry.
Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-29 A T - MIO-16X User Manual DACs, and DACCOMP is set, this is an err or cond ition and sho uld be ha ndle d appro pri at ely . If D AC FIF OEF * is s et, then the DAC FIFO has at least one remaining point to be transfe rred.
Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 30 © Natio nal Inst rument s Corporati on Status Registe r 2 Status Register 2 contains 1 bit of AT-MI O-16X hard ware status information for monitoring the status of the A/D conversion.
Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-31 A T - MIO-16X User Manual Analog Inpu t Register Group The two r egisters ma king up the Analog I npu t Re gister G roup c ontrol the an alog i nput cir cuitry and can be used to r ead the AD C FIFO.
Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 32 © Natio nal Inst rument s Corporati on ADC FIFO Regist er Reading the A DC FIFO Register returns the olde st ADC conversion valu e stor ed in th e ADC FIF O.
Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-33 A T - MIO-16X User Manual (0x8000 to 0x7 FFF) when the ADC is in bipolar mode .
Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 34 © Natio nal Inst rument s Corporati on To conv ert from the AD C FIFO value to the input volta ge measu red, us e the following for mula: V = ADC reading * 10 V 32,768 Gain Table 4- 8.
Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-35 A T - MIO-16X User Manual CONFIGMEM Regi ster The CONFIGMEM Register controls the input channel-selection multiplexers, gain, ra nge, and mode settings, and can contain up to 512 c hanne l con figuration settings for u se in sc anning se quen ce s.
Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 36 © Natio nal Inst rument s Corporati on 12 CHAN_BIP Cha nnel Bipolar—T his bit configures the ADC for unip olar or bipolar mod e. When CHAN _BIP is clear, th e ADC is configure d for unipolar ope ration and values read from th e ADC FIFO ar e in straight b ina ry forma t.
Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-37 A T - MIO-16X User Manual 5-3 CH_GAIN<2..0> C hannel Gain Select–T hese three bits control the gain setting of the i nput PGIA for the selected channel.
Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 38 © Natio nal Inst rument s Corporati on 2 CHAN_LAST Channel Last—This bit sh ould be se t in the last entry of the scan sequence loaded into the chan nel config uration memo ry.
Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-39 A T - MIO-16X User Manual Writing to the chann el config uration m emory must be preced ed with a strobe to the CONFIGMEMCL R Register.
Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 40 © Natio nal Inst rument s Corporati on Continual strobi ng of the CONFIGM EMLD Register with only one value in the list serves only to reload this one value. Continual strobing with more than one value in the memory sequences thr ough the channel configura tion list.
Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-41 A T - MIO-16X User Manual Analog Outp ut Regist er Group The two register s making up the Analog Output Register Group access the two analog output channels.
Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 42 © Natio nal Inst rument s Corporati on The formu la for the voltage outp ut versus digital cod e for a bipolar analog output con.
Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-43 A T - MIO-16X User Manual Bit descriptions f or the registers making up the A nalog Output Register Group are give n on the following pages. 16,384 40 00 5.0 V 32,767 7FFF 9 .
Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 44 © Natio nal Inst rument s Corporati on DAC0 Register Writing to the DA C0 Register loads t he value written to the analog output DA C C hanne l 0 in im media te upd ate m ode.
Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-45 A T - MIO-16X User Manual DAC1 Register Writing to the DA C1 Register loads t he value written to the analog output DA C C hanne l 1 in im media te upd ate m ode.
Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 46 © Natio nal Inst rument s Corporati on ADC Event Strobe Re gister Group The A DC E ve nt Strobe Registe r Group c ons ists of si.
Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-47 A T - MIO-16X User Manual CONFIGMEM CLR Regist er Accessing the CONFIGMEMCLR Register clears all informat io n in the channel confi guration memory and resets the write pointer to the first location in the memory.
Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 48 © Natio nal Inst rument s Corporati on CONFIGMEMLD Reg ister Accessi ng t he CONFI GMEMLD Register loa ds and sequen ces thr ough the cha nnel c onfigur ation m emory .
Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-49 A T - MIO-16X User Manual DAQ Clear Register Accessi ng the D AQ Clear R egister location clears t he data a cquisition circu itry.
Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 50 © Natio nal Inst rument s Corporati on DAQ Start Re gister Accessing t he DAQ Start Register location ini tiates a multiple A/D conversio n data ac quisition ope ration.
Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-51 A T - MIO-16X User Manual Single Conversion Register Accessing the Single Conversion Register location initiates a single A/D c onversio n.
Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 52 © Natio nal Inst rument s Corporati on ADC Calibration Regi ster Accessing the AD C Calibration Register location initiates an ADC calibration p rocedure. Th is register shou ld be strobed after powe r up to assure the ADC is in a calibrated state.
Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-53 A T - MIO-16X User Manual DAC Event Strobe Re gister Group The DAC E vent Strobe Registe r Group c onsists of th.
Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 54 © Natio nal Inst rument s Corporati on TMRREQ Clear Reg ister Accessi ng the TMRREQ Clear Regist er clears the TMRREQ and DACCOMP bits after a TMRTRIG* pulse is detected. Clearing TMRREQ when interrupt or DMA mode is enabled clears the respective interrupt or DMA request.
Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-55 A T - MIO-16X User Manual DAC Up date Re gister Accessi ng the DAC Upda te Register with p osted update mode en .
Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 56 © Natio nal Inst rument s Corporati on DAC Clear Register Accessi ng the DAC Clea r Register clears parts of the DAC circuit ry, including emptyin g the DAC FIFO.
Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-57 A T - MIO-16X User Manual General Event Strobe Register Group The Gene ral Event Strobe Reg ister Group co nsist.
Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 58 © Natio nal Inst rument s Corporati on DMA Channel Clear Regi ster Accessi ng the DM A Channel Clear Regist er cl ears the ci rcuitry asso ci ated with du al-cha nnel D MA op eration .
Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-59 A T - MIO-16X User Manual DMATCA Cl ear Regi ster Accessi ng the DMATCA C lear Regi ster will clear th e DMATCA signal in Status Reg ister 1, a nd it will ac know led ge the inte rrupt ge nera ted from the Channel A terminal counter inter rupt.
Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 60 © Natio nal Inst rument s Corporati on DMATCB Cl ear Register Accessi ng the DMATCB Cl ear Register clears the DMAT CB signal i n Status Register 1, an d acknowledge s the interru pt generated fro m the Channe l B ter minal cou nter i nterrupt .
Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-61 A T - MIO-16X User Manual Extern al Strobe Register Accessi ng the Extern al Strobe Register locati on gene rates an activ e low signal at the EXTS TROBE* output of the I/O conn ector.
Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 62 © Natio nal Inst rument s Corporati on Calibration DAC 0 Load Register Accessi ng the Cal ibration DAC 0 L oad Registe r loads th e serial d ata previously shifted into one of the eight selected 8-bit calibration DACs.
Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-63 A T - MIO-16X User Manual Calibration DAC 1 Load Register Accessi ng the Cal ibration DAC 1 L oad Registe r loads th e serial d ata shifted into the 12-bit ADC pregain offset calibration DACs.
Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 64 © Natio nal Inst rument s Corporati on Am9513A Count er/Timer Register Group The thre e re giste rs ma king up the Am 951 3A Co unte r/Time r R egis ter Group access the onboa rd c ounter/timer.
Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-65 A T - MIO-16X User Manual Am9513A D ata Register With the Am9513A Data Register, any of the 18 internal register s of the Am9513A can be written to or read from.
Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 66 © Natio nal Inst rument s Corporati on Am9513A Comm and Register The Am9 513A Command Reg ister controls the overall ope ration of the Am9513A Counter/Timer and co ntrols selection of the inte rnal registers ac cessed throu gh the A m9513 A Data R egister.
Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-67 A T - MIO-16X User Manual Am9513A Statu s Register The Am95 13A Status Register conta ins information ab out the output pin status of each counte r in the Am9513A .
Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 68 © Natio nal Inst rument s Corporati on Digita l I/O Register G roup The two register s making up the Digital I/O Registe r Group monitor an d control the AT-MIO- 16X digital I/O lines.
Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-69 A T - MIO-16X User Manual Digital I nput R egister The Digital Input Register, when read, re turns the logic state of the eight AT-M IO-1 6X dig ital I /O lin es.
Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 70 © Natio nal Inst rument s Corporati on Digital O utput Register Writing to the Digital Output Register controls the eight AT-MIO-16X digital I/O lines. The Digital Output Register controls both ports A and B.
Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-71 A T - MIO-16X User Manual RTSI Switch R egister Group The two registers ma king up the RTSI Switch Register Grou.
Chapter 4 Re gister Map an d Descriptions AT-MIO-16X User Manual 4- 72 © Natio nal Inst rument s Corporati on RTSI Switch Shif t Register The RTSI Switch Shift Register is written to in order to load the RTSI switch inte rnal 56-bit Control Register with routing info rmation for switching signals to and from the R TSI bus trigger lines.
Chap ter 4 Re gister Map an d Descript ions © Nati onal Instrum ents Corporat ion 4-73 A T - MIO-16X User Manual RTSI Switch Strobe Register The RTSI Switch Strobe Register is written to in order to load the contents of the RTSI Switch Shift Register into the RTSI Switch Control Register, thereby updating the RTSI sw itch routing pattern.
© Nati onal Instrum ents Corporat ion 5-1 A T- MIO-16X User Manual Chapter 5 Programming This chapter contains pro gramming instru ctions for ope rating the circ uitry on t he AT-M IO-16 X. Programm ing the AT-MI O-16X invo lves writing to and reading from the variou s registers on the board.
Chapter 5 P rogramm ing AT-MIO-16X User Manual 5 -2 © Natio nal Inst rument s Corporati on Table 5-1 provide s a general overv iew of the AT-MI O-16X resou rces to ensure there are no conflicts when using the cou nters/timers.
Chapte r 5 Progra mming © Nati onal Instrum ents Corporat ion 5-3 A T- MIO-16X User Manual 4. Disable all RTSI swi tch conn ections (see Programming the R TSI Switch section later in this chapter). This sequence lea ves the AT-MIO-16X circ uitry in the following state: • DMA and inte rrupts ar e disa bled.
Chapter 5 P rogramm ing AT-MIO-16X User Manual 5 -4 © Natio nal Inst rument s Corporati on Figur e 5-1. Ini tiali zing t he Am9 513A Counte r/Ti mer W rite 0xFFFF to the Am9513A Command Register W ri.
Chapte r 5 Progra mming © Nati onal Instrum ents Corporat ion 5-5 A T- MIO-16X User Manual Programm ing the Analog I nput Circu itry The ana log input circuitry can be programm ed for a number of differen t modes de pend ing o n th e a pplication.
Chapter 5 P rogramm ing AT-MIO-16X User Manual 5 -6 © Natio nal Inst rument s Corporati on Figur e 5-2. Sin gle Conv ersion Pr ogramm ing Generating a Single Conversio n An A/D c onver sion can be in itiated in one of tw o w ays: a software-genera ted pulse or a hardware pulse.
Chapte r 5 Progra mming © Nati onal Instrum ents Corporat ion 5-7 A T- MIO-16X User Manual Readin g a Single Conver sion Result A/D conversion results are available when ADCFIFOE F* is set in the Status Register and can be obtained by reading the ADC FIFO Re gister.
Chapter 5 P rogramm ing AT-MIO-16X User Manual 5 -8 © Natio nal Inst rument s Corporati on In posttrigger sequences, the sample counter starts counting after receipt of the first trigger, while in the pr etrigger a cquisition mode, the sample counter does not start counting until a secon d trigger co ndition occurs.
Chapte r 5 Progra mming © Nati onal Instrum ents Corporat ion 5-9 A T- MIO-16X User Manual Figur e 5-3. Sin gle-Chan nel Dat a Acquisi tion Pr ogramming ST AR T Program a single analog input channel,.
Chapter 5 P rogramm ing AT-MIO-16X User Manual 5- 10 © Natio nal Inst rument s Corporati on Programm ing Data Acquisiti on Seque nces with Channel Sca nning The prec eding data ac quisition program ming sequenc e progra ms the AT-MIO-16X for multiple A/D conversions on a single input chan nel.
Chapte r 5 Progra mming © Nati onal Instrum ents Corporat ion 5-11 A T - MIO-16X User Manual Figu re 5-4 . Scanni ng Dat a Acquisi tion P rogrammi ng Setting the SCANEN bit in conjunction with the D AQEN bit in Command Register 1 e nable s scan ning during mu ltiple A/ D conversio ns.
Chapter 5 P rogramm ing AT-MIO-16X User Manual 5- 12 © Natio nal Inst rument s Corporati on Interval-Channe l Scanning Data Acqu isition Follow the prog ra mming steps listed in Figu re 5-5 to p rogr.
Chapte r 5 Progra mming © Nati onal Instrum ents Corporat ion 5-13 A T - MIO-16X User Manual Figur e 5-5. Interval Scann ing Data Ac quisition Programmi ng ST AR T Program multiple analog input chann.
Chapter 5 P rogramm ing AT-MIO-16X User Manual 5- 14 © Natio nal Inst rument s Corporati on Setting the SCANEN bit in conjunction with the D AQEN bit in Command Register 1 e nable s scan ning during mu ltiple A/ D conversio ns.
Chapte r 5 Progra mming © Nati onal Instrum ents Corporat ion 5-15 A T - MIO-16X User Manual Program ming Single-Ana log Inp ut Chann el Confi gurations The analo g input cha nn el, gain, mod e, and ra nge fo r single conv ersion and single cha nnel acquisition are sele cted by writing a single configura tion value to th e CONF IGME M Re gister.
Chapter 5 P rogramm ing AT-MIO-16X User Manual 5- 16 © Natio nal Inst rument s Corporati on configura tion memory, perform th e followin g write opera tions where N is the number of entries in the scan sequence: • Stro be the CONFIGMEMC LR Re gister .
Chapte r 5 Progra mming © Nati onal Instrum ents Corporat ion 5-17 A T - MIO-16X User Manual found in Appe ndix C, AMD Am 9513A Data Sheet . Use on e of the following m ode v alues: 8225 — Selec ts.
Chapter 5 P rogramm ing AT-MIO-16X User Manual 5- 18 © Natio nal Inst rument s Corporati on Sample Counts 2 t hrough 65,536 Use the following programming sequence to program t he sample counter for sample counts up to 65 ,536. The mi nimum permitted sample count is 2.
Chapte r 5 Progra mming © Nati onal Instrum ents Corporat ion 5-19 A T - MIO-16X User Manual 1. Write FF04 to the Am9513A Com mand Register to select the Coun ter 4 Mod e Regis ter . 2. Write 1025 to the A m9513A Data Register to store the Counter 4 mode value for posttr igger acquisition mo des.
Chapter 5 P rogramm ing AT-MIO-16X User Manual 5- 20 © Natio nal Inst rument s Corporati on acquisition operation is terminated when Cou nter 4 and Counter 5 reach zero . Programm ing the Sca n-Interval Counter Counter 2 of the A m9513A Counte r/Timer is used a s the sc an-inte rval counter.
Chapte r 5 Progra mming © Nati onal Instrum ents Corporat ion 5-21 A T - MIO-16X User Manual 7. En tries stored in the mux-channe l gain memory should be s canned once during a sca n interv al. T he f ollow ing condition mus t be satisfied: scan interval ≥ sample inter val * x , where x is the number of entries in th e scan sequ ence.
Chapter 5 P rogramm ing AT-MIO-16X User Manual 5- 22 © Natio nal Inst rument s Corporati on Serv icing the Data Acqui sitio n Operat ion Once the data a cquisition operation is initiate d with the application of a trigg er , the opera tion must be s ervice d by re a ding the AD C FI FO.
Chapte r 5 Progra mming © Nati onal Instrum ents Corporat ion 5-23 A T - MIO-16X User Manual Resetting a Single Am95 13A Counter/Ti mer To reset a p articular co unter in the A m951 3A , use the follow ing program ming sequenc e. All writes ar e 16-bit operation s.
Chapter 5 P rogramm ing AT-MIO-16X User Manual 5- 24 © Natio nal Inst rument s Corporati on Figu re 5-6. R esetting an Am9513A Count er/Timer Write 0xFF00 + ctr to the Am9513A Command Re gister Write.
Chapte r 5 Progra mming © Nati onal Instrum ents Corporat ion 5-25 A T - MIO-16X User Manual Programm ing the Analog O utput Circuitry The volta ges a t the a nal og ou tput c irc uitry ou tput p ins.
Chapter 5 P rogramm ing AT-MIO-16X User Manual 5- 26 © Natio nal Inst rument s Corporati on Cyclic Waveform Generation The simple st mode of w aveform genera tion is the cyclic m ode in wh ich an internal or external timi ng signal is used to update the DACs.
Chapte r 5 Progra mming © Nati onal Instrum ents Corporat ion 5-27 A T - MIO-16X User Manual Figur e 5-7. Cy clic Wavefo rm Programmin g END ST AR T Clear the analog output circuitry including the D .
Chapter 5 P rogramm ing AT-MIO-16X User Manual 5- 28 © Natio nal Inst rument s Corporati on Programmed Cycle Waveform Generation A superset of the waveform f unctionality exists if DAC data buffer i s less than o r e qual to 2, 048 fo r one c ha nnel, or less than o r equal 1,0 24 per DAC for two channels.
Chapte r 5 Progra mming © Nati onal Instrum ents Corporat ion 5-29 A T - MIO-16X User Manual Figur e 5-8. Prog rammed Cycl e Waveform Programmi ng END ST AR T Clear the analog output circuitry includ.
Chapter 5 P rogramm ing AT-MIO-16X User Manual 5- 30 © Natio nal Inst rument s Corporati on One disad vantage of the programm ed cycle waveform ge neration is that it uses yet another counter to perfo rm the cycle counting.
Chapte r 5 Progra mming © Nati onal Instrum ents Corporat ion 5-31 A T - MIO-16X User Manual Figu re 5-9. Puls ed Cyclic Waveform Program ming In thi s mode, C ounter 1 counts the prog rammed number of cycles before terminating the sequence.
Chapter 5 P rogramm ing AT-MIO-16X User Manual 5- 32 © Natio nal Inst rument s Corporati on sequence of events continues ad infinitum and does not stop until the update sign al is rem oved or the D AC c ircuitry is clear ed. This sequence requires that the GATE2SEL signal in addition to the SRC3SEL signal be set in Com mand Register 4.
Chapte r 5 Progra mming © Nati onal Instrum ents Corporat ion 5-33 A T - MIO-16X User Manual sequence. All writes ar e 16-bit operations. A ll values given are hexadecim al. 1. Write FF00 + n to the Am9513A Comman d Register to select th e Counter n Mode Reg ister.
Chapter 5 P rogramm ing AT-MIO-16X User Manual 5- 34 © Natio nal Inst rument s Corporati on Programming t he Waveform Cycle Counter Select the appr opr iate c ounter (1 , 2, or 5 ) fro m the Am95 13A Counter /Timer to be used for co unting DAC bu ffer cyc les.
Chapte r 5 Progra mming © Nati onal Instrum ents Corporat ion 5-35 A T - MIO-16X User Manual 2. Write the mod e value to the Am95 13A Data Registe r to stor e the Counter 2 mod e value. Am9513 A counter mod e informatio n can be found in Appe ndix C, AMD Am 9513A Data Sheet .
Chapter 5 P rogramm ing AT-MIO-16X User Manual 5- 36 © Natio nal Inst rument s Corporati on Clear Register before exiting the interrupt routine. This clears the interrupt re quest. The best method of ser vicing update requests is with DMA since this is done in parallel with the PC CPU.
Chapte r 5 Progra mming © Nati onal Instrum ents Corporat ion 5-37 A T - MIO-16X User Manual If any digital I/O line is not driven, it floats to an indeterminate value. If more than one device is driving any digital I/O line, the voltage at that line may a lso be indeterminate.
Chapter 5 P rogramm ing AT-MIO-16X User Manual 5- 38 © Natio nal Inst rument s Corporati on Figure 3-19 in Ch apter 3, Th eory of Operation , diag rams t he AT-MIO-16X RTSI switc h con nections .
Chapte r 5 Progra mming © Nati onal Instrum ents Corporat ion 5-39 A T - MIO-16X User Manual Note : If both the A2DRV and A2RCV b its are set, the GATE1 signal is driven by the signal OUT2. This arrangem ent is probably not desirable. • To drive the RTSI switch pin A4 with the signal OUT5, set the A4D RV b it in C omm and Re gister 2.
Chapter 5 P rogramm ing AT-MIO-16X User Manual 5- 40 © Natio nal Inst rument s Corporati on Figu re 5-10. RTSI S witch Cont rol Pattern In Figure 5-10, the fi elds labeled A6 throug h A0 and B6 through B0 a re the 4-bit c ontrol fields for each RTSI switch pin of the same na me.
Chapte r 5 Progra mming © Nati onal Instrum ents Corporat ion 5-41 A T - MIO-16X User Manual To pr ogr am t h e RTS I s w it ch , co mp le t e t he se st ep s: 1. Calcula te the 56-bit pattern base d on the desired signa l routing. a. Clear the OUTEN bit for all input pins and for all unused pins.
Chapter 5 P rogramm ing AT-MIO-16X User Manual 5- 42 © Natio nal Inst rument s Corporati on 3. Program the DMA controller to service DMA request s from the AT-MI O-16X boa rd . Refe r to t he IBM Pers onal Computer AT Technical Reference manual f or mo re i nf orma tion o n DM A contro ller progra mming.
Chapte r 5 Progra mming © Nati onal Instrum ents Corporat ion 5-43 A T - MIO-16X User Manual Interrupt Programm ing Seven dif fere nt interr upts are ge nera ted by the AT-M IO- 16X boa rd : • When.
© Nati onal Instrum ents Corporat ion 6-1 A T- MIO-16X User Manual Chapter 6 Calibration Procedures This chap ter discu sses the calibration resourc e s and procedur es for the AT-MIO- 16X analog input and analog outpu t circuitr y.
Chapter 6 Calibration Procedure s AT-MIO-16X User Manual 6 -2 © Natio nal Inst rument s Corporati on Figu re 6-1 . AT-M IO-16X EEPR OM Map The A T-MI O-16X is fac tory calibr ated befor e shipm e nt, and th e associate d calibra tion const ants are stored in t he fact ory area of the EEPRO M .
Chap ter 6 Calibrat ion Procedur es © Nati onal Instrum ents Corporat ion 6-3 A T- MIO-16X User Manual 124 Reserved 123 Board Code (AT-MIO-1 6X = 2) 122 Revision and Sub-Re vision Fiel d 121 Configur.
Chapter 6 Calibration Procedure s AT-MIO-16X User Manual 6 -4 © Natio nal Inst rument s Corporati on When the AT-MIO- 16X board is powered on, or t he conditions under which it is opera ting ch ange , the calibra tion DAC s sh ould be loa ded with values from the EEPROM, or if desired, the board can be recalibrate d.
Chap ter 6 Calibrat ion Procedur es © Nati onal Instrum ents Corporat ion 6-5 A T- MIO-16X User Manual Figur e 6-2. Revisi on and Subrevi sion Field If the R evision a nd Sub revision Field conta in the bina ry va lue 00100010, this signifies that the accessed A T-MIO-16 X board is at Revision C a nd Sub revision 2.
Chapter 6 Calibration Procedure s AT-MIO-16X User Manual 6 -6 © Natio nal Inst rument s Corporati on Figur e 6-4. ADC and DAC F IFO Dep th Fiel d If the AD C an d DA C FIFO De pth Field co ntain s th.
Chap ter 6 Calibrat ion Procedur es © Nati onal Instrum ents Corporat ion 6-7 A T- MIO-16X User Manual be XXXXX00 0. If the a nalog input section is c alibrated using the utility librar y funct ions .
Chapter 6 Calibration Procedure s AT-MIO-16X User Manual 6 -8 © Natio nal Inst rument s Corporati on It is important to realize that inaccuracy of the internal voltage refere nce resul ts only i n gain erro r.
Chap ter 6 Calibrat ion Procedur es © Nati onal Instrum ents Corporat ion 6-9 A T- MIO-16X User Manual a two 's comp lemen t binary n umb er in the on boa rd E EPROM f or subsequent use by the analog input calibra tion routines.
Chapter 6 Calibration Procedure s AT-MIO-16X User Manual 6- 10 © Natio nal Inst rument s Corporati on CALDAC1 until the measured voltage is equal to the value of the refere nce a s stor ed in the on board E EPROM . Onc e the bo ar d is calibrated at a gain of 1, there is only a small residual gain error (±0.
Chap ter 6 Calibrat ion Procedur es © Nati onal Instrum ents Corporat ion 6-11 A T - MIO-16X User Manual output to 5 V and adjusts CALDA C4 and CALDAC5 until it measures 5 V betwee n each a nalog output and AO GND. The ga in error is al ways calibrated immedia tely after the offset is calibrate d.
© Nat ional Instru ments Corpor ation A-1 AT-MIO -16X Us er Manua l Appendix A Specifications This appendix lists the specifica tions of the AT-MIO-16X. These are typical at 25° C unless o therwise state d. The operatin g temperat ure range is 0° to 70° C.
Appendix A S pecification s AT-MIO-16X U ser Manual A-2 © Natio nal Inst rument s Corporati on Input i m peda nc e ... .. .... .. .. .... ... .. .... .. .... . 100 G Ω in parallel with 100 pF Gains ....... ...... ...... ...... ...... ..... ...... .
Appendix A Specific ations © Nat ional Instru ments Corpor ation A-3 AT-MIO -16X Us er Manua l Long-term stability .......................15 pp m (75 µ V/ ) Explanatio n of Analog Inpu t Specificati ons Linear E rrors Pregain offset error is the amoun t of possibl e voltag e offset err or in the circu itr y b efo re th e gai n s tag e.
Appendix A S pecification s AT-MIO-16X U ser Manual A-4 © Natio nal Inst rument s Corporati on Nonlin ear Errors Relative accuracy i s a measur e of the (non )linearity of an analog system. It indicates the maximum de viation of the aver aged analog-inp ut-to- digital-outpu t transf er cur ve fr om a n end poin t-fit straight line.
Appendix A Specific ations © Nat ional Instru ments Corpor ation A-5 AT-MIO -16X Us er Manua l Multipl e-Channel Sca nning Acquisition Rates When sc anning a mong chann els with dif ferent vol tages, the analog circui try on the AT-MIO-16X needs time to settle fr om one voltage to the next.
Appendix A S pecification s AT-MIO-16X U ser Manual A-6 © Natio nal Inst rument s Corporati on the same gain and all t he signals are within 10% of the full- scale range of each other (fo r exam ple, within 2 V of each other with a ±10-V range), the circuitry settles t o full 16-bit accuracy (±0.
Appendix A Specific ations © Nat ional Instru ments Corpor ation A-7 AT-MIO -16X Us er Manua l Output vol tag e rang es ... ..... .. .... .. .. .... .. . 0 to 1 0 V , un ipol ar mod e; ±10 V , bi polar mode , (softwa re-select able) Curren t d ri ve ca pa bi lit y .
Appendix A S pecification s AT-MIO-16X U ser Manual A-8 © Natio nal Inst rument s Corporati on Diff er enti al n on lin ear ity in a DA C is a m easur e of devia tio n of co de width f rom 1 LSB. For a D AC, code width is the differenc e between the analog va lues produce d by consec utive digital codes.
Appendix A Specific ations © Nat ional Instru ments Corpor ation A-9 AT-MIO -16X Us er Manua l Power Requirement (from PC I/O Channel) Power c on sump t io n ..... .. .. ... .... .. .. .. .... .. . 2.0 A ty pic al at + 5 VD C Power availab le at I/O c onnector .
© Nat ional Instru ments Corpor ation B-1 AT-MIO -16X Us er Manua l Appendix B I/O Connector This a ppend ix de scribe s the pino ut and signa l nam es for the AT-MIO- 16X 50- pin I/O conn ec tor a nd the 68 -pin I/O co nnecto r. Figure B-1 sho ws t he A T -MIO -1 6X 5 0-p i n I /O c onnec tor.
Appendix B I/O Connector AT-MIO-16X U ser Manual B-2 © Natio nal Inst rument s Corporati on Figur e B-1. AT-MIO-16X 50-Pin I/O C onnector 1 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31.
Appen dix B I/O Connec tor © Nat ional Instru ments Corpor ation B-3 AT-MIO -16X Us er Manua l Figure B-2 sho ws th e p in a ssign me nts f or the AT -M IO-1 6X 6 8-p in I/O connec tor.
Appendix B I/O Connector AT-MIO-16X U ser Manual B-4 © Natio nal Inst rument s Corporati on Table B -1. Signal C onnectio n Description s 68-Pin Pins 50-Pin Pins Si gnal Names Descriptions 24, 27, 29.
Appen dix B I/O Connec tor © Nat ional Instru ments Corpor ation B-5 AT-MIO -16X Us er Manua l 8, 14 34, 35 +5 V +5 VDC Source—These pins are fu sed for up to 1 A of +5 V supply. 46 36 SCANC LK Scan Clock—This pin pulses once f or each A/D conversion in the scanning modes.
Appendix B I/O Connector AT-MIO-16X U ser Manual B-6 © Natio nal Inst rument s Corporati on 40 43 OUT1 OUTPUT1— This pin is fro m the Am9513A Coun ter 1 sign al.
© Nat ional Instru ments Corpor ation C-1 AT-MIO -16X Us er Manua l Appendix C AMD Am9513A Data Sheet 1 This a ppend ix c ontai ns the manu fa cturer d ata sh eet f or the A MD Am9513A Sy stem Timing Controller integra ted circui t (Advan ced Micro Devices, Inc.
Appendix C AMD Am9513A Data Sheet AT-MIO-16X U ser Manual C-2 © Natio nal Inst rument s Corporati on.
Appendix C AMD Am9513A Da ta Sheet © Nat ional Instru ments Corpor ation C-3 AT-MIO -16X Us er Manua l.
Appendix C AMD Am9513A Data Sheet AT-MIO-16X U ser Manual C-4 © Natio nal Inst rument s Corporati on.
Appendix C AMD Am9513A Da ta Sheet © Nat ional Instru ments Corpor ation C-5 AT-MIO -16X Us er Manua l.
Appendix C AMD Am9513A Data Sheet AT-MIO-16X U ser Manual C-6 © Natio nal Inst rument s Corporati on.
Appendix C AMD Am9513A Da ta Sheet © Nat ional Instru ments Corpor ation C-7 AT-MIO -16X Us er Manua l.
Appendix C AMD Am9513A Data Sheet AT-MIO-16X U ser Manual C-8 © Natio nal Inst rument s Corporati on.
Appendix C AMD Am9513A Da ta Sheet © Nat ional Instru ments Corpor ation C-9 AT-MIO -16X Us er Manua l.
Appendix C AMD Am9513A Data Sheet AT-MIO-16X U ser Manual C-10 © Natio nal Inst rument s Corporati on.
Appendix C AMD Am9513A Da ta Sheet © Nat ional Instru ments Corpor ation C-11 AT-MIO-16X User Ma nual.
Appendix C AMD Am9513A Data Sheet AT-MIO-16X U ser Manual C-12 © Natio nal Inst rument s Corporati on.
Appendix C AMD Am9513A Da ta Sheet © Nat ional Instru ments Corpor ation C-13 AT-MIO-16X User Ma nual.
Appendix C AMD Am9513A Data Sheet AT-MIO-16X U ser Manual C-14 © Natio nal Inst rument s Corporati on.
Appendix C AMD Am9513A Da ta Sheet © Nat ional Instru ments Corpor ation C-15 AT-MIO-16X User Ma nual.
Appendix C AMD Am9513A Data Sheet AT-MIO-16X U ser Manual C-16 © Natio nal Inst rument s Corporati on.
Appendix C AMD Am9513A Da ta Sheet © Nat ional Instru ments Corpor ation C-17 AT-MIO-16X User Ma nual.
Appendix C AMD Am9513A Data Sheet AT-MIO-16X U ser Manual C-18 © Natio nal Inst rument s Corporati on.
Appendix C AMD Am9513A Da ta Sheet © Nat ional Instru ments Corpor ation C-19 AT-MIO-16X User Ma nual.
Appendix C AMD Am9513A Data Sheet AT-MIO-16X U ser Manual C-20 © Natio nal Inst rument s Corporati on.
Appendix C AMD Am9513A Da ta Sheet © Nat ional Instru ments Corpor ation C-21 AT-MIO-16X User Ma nual.
Appendix C AMD Am9513A Data Sheet AT-MIO-16X U ser Manual C-22 © Natio nal Inst rument s Corporati on.
Appendix C AMD Am9513A Da ta Sheet © Nat ional Instru ments Corpor ation C-23 AT-MIO-16X User Ma nual.
Appendix C AMD Am9513A Data Sheet AT-MIO-16X U ser Manual C-24 © Natio nal Inst rument s Corporati on.
Appendix C AMD Am9513A Da ta Sheet © Nat ional Instru ments Corpor ation C-25 AT-MIO-16X User Ma nual.
Appendix C AMD Am9513A Data Sheet AT-MIO-16X U ser Manual C-26 © Natio nal Inst rument s Corporati on.
Appendix C AMD Am9513A Da ta Sheet © Nat ional Instru ments Corpor ation C-27 AT-MIO-16X User Ma nual.
Appendix C AMD Am9513A Data Sheet AT-MIO-16X U ser Manual C-28 © Natio nal Inst rument s Corporati on.
Appendix C AMD Am9513A Da ta Sheet © Nat ional Instru ments Corpor ation C-29 AT-MIO-16X User Ma nual.
Appendix C AMD Am9513A Data Sheet AT-MIO-16X U ser Manual C-30 © Natio nal Inst rument s Corporati on.
Appendix C AMD Am9513A Da ta Sheet © Nat ional Instru ments Corpor ation C-31 AT-MIO-16X User Ma nual.
Appendix C AMD Am9513A Data Sheet AT-MIO-16X U ser Manual C-32 © Natio nal Inst rument s Corporati on.
Appendix C AMD Am9513A Da ta Sheet © Nat ional Instru ments Corpor ation C-33 AT-MIO-16X User Ma nual.
Appendix C AMD Am9513A Data Sheet AT-MIO-16X U ser Manual C-34 © Natio nal Inst rument s Corporati on.
Appendix C AMD Am9513A Da ta Sheet © Nat ional Instru ments Corpor ation C-35 AT-MIO-16X User Ma nual.
Appendix C AMD Am9513A Data Sheet AT-MIO-16X U ser Manual C-36 © Natio nal Inst rument s Corporati on.
Appendix C AMD Am9513A Da ta Sheet © Nat ional Instru ments Corpor ation C-37 AT-MIO-16X User Ma nual.
Appendix C AMD Am9513A Data Sheet AT-MIO-16X U ser Manual C-38 © Natio nal Inst rument s Corporati on.
Appendix C AMD Am9513A Da ta Sheet © Nat ional Instru ments Corpor ation C-39 AT-MIO-16X User Ma nual.
Appendix C AMD Am9513A Data Sheet AT-MIO-16X U ser Manual C-40 © Natio nal Inst rument s Corporati on.
© Nat ional Instru ments Corpor ation D-1 AT-MIO-1 6X Use r Manual Appendix D Customer Communication For yo ur convenience, t his append ix contain s forms t o help you gather the inf ormatio n necessary to help us solve you r technical problems and a form you can use to commen t on the pro duct documentation.
Fax-on- Demand is a 2 4-hour inf ormation retr ieval syst em containing a library of d ocuments on a wide range of tech nical information. You can access Fax-on-Demand fro m a touch-tone telephone at (512 ) 418-1111 .
Technical Support Form Photocopy this fo rm and u pdate it each time y ou make ch anges to you r software or h ardware, and use the completed copy of this form as a reference for your current configuratio n.
AT-MIO-16X Hardware and Software Configuration Form Record the settings and revisions of your h ardware and software on the line to the right of each item. Complete a new copy of this form each time you revi se your software or hardware conf iguration, and use this form as a reference for your current configur ation.
Documentation Comment Form National Instrum ents encourages you to commen t on the do cumentatio n supplie d with our prod ucts. This information hel ps us provide quality pro duc ts to meet your needs.
© Nat ional Instru ments Corpor ation G-1 AT-MIO-1 6X Use r Manual Glossary Numbers/Symbols % perce nt + positive of, or plus – n egative of, or minus /p e r °d e g r e e Ω ohm A A amper es AC a.
Gloss ar y AT-MIO-1 6X User Manu al G-2 © Natio nal Inst rument s Corporati on AC coup led allowing the trans mission of AC signals w hile bloc king D C signals A/D analog-to-digital ADC analog-to-di.
Glossary © Nat ional Instru ments Corpor ation G-3 AT-MIO-1 6X Use r Manual B b bit—one binary digit, either 0 or 1 B byte— eight r elated bits o f data, an eight- bit binary n umb er. Also used to denote the amount of me mory requir ed to store one byte of data.
Gloss ar y AT-MIO-1 6X User Manu al G-4 © Natio nal Inst rument s Corporati on bus master a type of a plug-in board or controller with the ability to read and write devices on the c ompute r b us C C.
Glossary © Nat ional Instru ments Corpor ation G-5 AT-MIO-1 6X Use r Manual common- mod e range the input ra ng e ov er w hich a ci rcuit ca n ha ndle a co mmo n- mod e signal common- mode signal the.
Gloss ar y AT-MIO-1 6X User Manu al G-6 © Natio nal Inst rument s Corporati on D D/A digital-t o-analog. DAC digital-to-a nalog conve rter—an electr onic device, often an integrated circ uit, that .
Glossary © Nat ional Instru ments Corpor ation G-7 AT-MIO-1 6X Use r Manual derivative c ontrol a con trol action with a n output that is propo rtional to the rate of change of the error sig nal. Deri vative c ontrol a nticipates t he magni tude dif fere nce bet ween th e process varia ble an d the set point .
Gloss ar y AT-MIO-1 6X User Manu al G-8 © Natio nal Inst rument s Corporati on drive rs software th at co ntr o ls a spec ifi c hardware de vice suc h as a DAQ boar d or a GPIB inte rface boa rd DSP .
Glossary © Nat ional Instru ments Corpor ation G-9 AT-MIO-1 6X Use r Manual external trigger a voltage pulse from an external source that triggers an event such as A/D conv ersion F F farad s false t.
Gloss ar y AT-MIO-1 6X User Manu al G -10 © Natio nal Inst rument s Corporati on Some co mmon ex ampl e of floati ng sign al sour ces ar e batte ries, transfor mers, o r thermoc ouples.
Glossary © Nat ional Instru ments Corpor ation G-11 AT-MIO -16X Us er Manua l handle pointe r to a pointer to a block of me mory; handles refe rence arrays an d strings. An array of strin gs is a handle to a block of me mory containing handles to string s.
Gloss ar y AT-MIO-1 6X User Manu al G -12 © Natio nal Inst rument s Corporati on sine wave a dded in a 4 :1 a mpl itude ratio. DIN—A 25 0 Hz sine wave and an 8 kHz sine wave a dded in a 4 :1 a mpl itude ratio. CCIF—A 14 kHz sine w ave and a 1 5 k Hz sine wave a dded in a 1 :1 a mpl itude ratio.
Glossary © Nat ional Instru ments Corpor ation G-13 AT-MIO -16X Us er Manua l interrupt le vel the relative pr iority at which a devic e can interrupt interval scanning scannin g method where th ere .
Gloss ar y AT-MIO-1 6X User Manu al G -14 © Natio nal Inst rument s Corporati on L LabVIEW labo rat ory v irt ual instrume nt eng in eering w or kbenc h latch latched digital I/O a type of digital acquisition/generation where a device or module accept s or transfers da ta after a digital pulse has been received .
Glossary © Nat ional Instru ments Corpor ation G-15 AT-MIO -16X Us er Manua l MB megabytes o f memo ry MBLT eight-by te block tran sfers in whic h both the Add ress b us and the Data bus ar e used to transfer data Mbytes/s a unit for data transfer that means 1 million or 10 6 bytes/s memory buf fer See buffe r.
Gloss ar y AT-MIO-1 6X User Manu al G -16 © Natio nal Inst rument s Corporati on NIST National Institute of Standards and Technology node s execut ion ele ments of a block d iagram co nsis ting of fu.
Glossary © Nat ional Instru ments Corpor ation G-17 AT-MIO -16X Us er Manua l operating system base-lev el softwa re tha t c ontr ols a com puter, r uns progr am s, inter a cts with users, a nd c omm.
Gloss ar y AT-MIO-1 6X User Manu al G -18 © Natio nal Inst rument s Corporati on PCMCIA an expansion bus ar chitecture that has found widespr ea d acceptance as a de f ac to s tand ar d in n ot eb ook -si ze co mpu t ers .
Glossary © Nat ional Instru ments Corpor ation G-19 AT-MIO -16X Us er Manua l ppm parts per million pretri ggering the tech nique used on a DAQ boar d to keep a continu ous buffer filled with data, s.
Gloss ar y AT-MIO-1 6X User Manu al G -20 © Natio nal Inst rument s Corporati on R RAM random-acc ess memory real time a property of an event or syste m in which data is process ed as it is acquire d.
Glossary © Nat ional Instru ments Corpor ation G-21 AT-MIO -16X Us er Manua l RTSI Real-Time System Integrat ion RTSI bus real-time syst em integration bus—the National Instruments tim ing bus that.
Gloss ar y AT-MIO-1 6X User Manu al G -22 © Natio nal Inst rument s Corporati on SE single-ended—a term used to de scribe an a nalog input that is m easured with respec t to a common gro und self-c.
Glossary © Nat ional Instru ments Corpor ation G-23 AT-MIO -16X Us er Manua l S/s samples per secon d—used to express the rate at which a DAQ board samples an analog signal STC system timing controller strain gauge a thin conductor, which is attached to a material, that detects stress or vibrations in that ma terial.
Gloss ar y AT-MIO-1 6X User Manu al G -24 © Natio nal Inst rument s Corporati on thermistor a semicondu ctor sensor that ex hibits a repeata ble change in elec trical resistan ce as a function of temp erature. Mo st thermistors exhi bit a negat ive temp eratur e coeffic ient.
Glossary © Nat ional Instru ments Corpor ation G-25 AT-MIO -16X Us er Manua l update rate the number of output upda tes per second V V volts V DC volts direct curre nt VDMAD virtual DMA driver VI vir.
Gloss ar y AT-MIO-1 6X User Manu al G -26 © Natio nal Inst rument s Corporati on word the sta ndard numb er of bits that a proc essor or me m ory manipula tes at one time.
© Nati onal Instrum ents Corporat ion I-1 AT - MIO-16X User Manual Index Numb ers +5 V signal desc ri ption (table) , 2-17, B-5 power connecti ons, 2-32 t o 2-33 A A2DRV bit descr ip t io n, 4-10 RTS.
Index AT-MIO-16X User Manual I-2 © Natio nal Inst rument s Corporati on ADCDSP bit, 4-13 ADCFIFOEF* bit descr ip t io n, 4-26 DMA op e rations , 5-41 inter r up t pro gramm ing, 5-43 reading sin gle .
Inde x © Nati onal Instrum ents Corporat ion I-3 AT - MIO-16X User Manual NRSE input , 2-9 to 2-10 RSE i nput, 2-9 common-mo de signal r ejectio n, 2-29 considerations for selectin g input ranges, 2-.
Index AT-MIO-16X User Manual I-4 © Natio nal Inst rument s Corporati on analog output specifications differential nonlinearity , A-8 gain e r ror, A-7 list of, A -6 to A -7 offset error, A-7 relative accuracy, A-7 AOGND signal analog out put connections , 2-30 desc ri ption (table) , 2-17, B-4 AT-MIO-16X.
Inde x © Nati onal Instrum ents Corporat ion I-5 AT - MIO-16X User Manual CH_GAIN<2..0>, 4 -37 to 4-38 CLKMODEB<1..0>, 4 -20 to 4-21 CNT32/1 6*, 4-7 to 4 -8, 5-18, 5 -19 CYCLICS TOP, 3-22, 4 -23, 5-26 D<15.
Index AT-MIO-16X User Manual I-6 © Natio nal Inst rument s Corporati on Confi guration Memo ry Depth Fi eld (figur e), 6-5 EEPROM map, 6-2 factory area inf ormation (table), 6-2 to 6-4 Revis ion and .
Inde x © Nati onal Instrum ents Corporat ion I-7 AT - MIO-16X User Manual example switch set tings (figure), 2-3 switch setting s, with base I/O address and address sp ace (table), 2-5 to 2-6 DMA cha.
Index AT-MIO-16X User Manual I-8 © Natio nal Inst rument s Corporati on DAC FI FO continuo us cyclic waveform generation, 3-22 to 3- 23 cyclic waveform generati on, 5-26 to 5-27 DAC waveform and circ.
Inde x © Nati onal Instrum ents Corporat ion I-9 AT - MIO-16X User Manual descr ip t io n, 4-49 DMA op e rations , 5-41 inter r up t pro gramm ing, 5-43 DAQ Start Register, 4-50 DAQCMPLINT bit, 4-14 .
Index AT-MIO-16X User Manual I- 10 © Natio nal Inst rument s Corporati on descr ip t io n, 2-22 ground- referenced sign al sources , 2-23 nonreferen ced or floating signal sources, 2-24 to 2- 26 reco.
Inde x © Nati onal Instrum ents Corporat ion I-11 A T- MIO-16X User Manual programmin g DMA operations, 5 -42 DMATCB Clear Register clearing analog outpu t circuitry, 5-32 descr ip t io n, 4-60 inter.
Index AT-MIO-16X User Manual I- 12 © Natio nal Inst rument s Corporati on F fax an d telephone s upport, D-2 Fax-on- Demand su pport, D-2 field wiring consi derati on s, 2-42 to 2-43 FIFO.
Inde x © Nati onal Instrum ents Corporat ion I-13 A T- MIO-16X User Manual I immediat e update mode, 3 -18 input con fi gur at io ns. See also CONFIGMEM Regist er.
Index AT-MIO-16X User Manual I- 14 © Natio nal Inst rument s Corporati on data acq uisition rates, 3-15 inter val scanning, 3-14 posttr igger dat a acquisi tion tim ing, 3-13 multiple-chann e l scan ning acquisitio n rates specifications, A-5 to A-6 typical settling times (t able), A-5 multiplexer, input.
Inde x © Nati onal Instrum ents Corporat ion I-15 A T- MIO-16X User Manual physical specifications, A-9 pin assi gnments. S ee I/O connectors. polarity input polarity and range, 2-10 to 2-11 output p.
Index AT-MIO-16X User Manual I- 16 © Natio nal Inst rument s Corporati on R refer ence ca libra tio n, 6- 8 to 6-9 reference selection, analo g output, 2-11 referenced sing le-ended input (RSE ).
Inde x © Nati onal Instrum ents Corporat ion I-17 A T- MIO-16X User Manual descr ip t io n, 4-56 DMA op e rations , 5-41 servici ng update r equests, 5-36 DAC Event Strobe Regi ster Group, 4-53 to 4-.
Index AT-MIO-16X User Manual I- 18 © Natio nal Inst rument s Corporati on RTSI latch, 3-19 RTSI switch defini tion, 3-3 0 programmi ng, 5-39 to 5-43 control pattern (figur e), 5-40 DMA op e rations ,.
Inde x © Nati onal Instrum ents Corporat ion I-19 A T- MIO-16X User Manual analog out put, 2-29 to 2-30 digit al I/O, 2- 31 to 2-32 field wiring consi derati on s, 2-42 to 2-43 I/O connector exceedin.
Index AT-MIO-16X User Manual I- 20 © Natio nal Inst rument s Corporati on programmed cycle waveform generati on, 5-30 pulse d cyclic wa veform g eneratio n, 5-32 STARTDAQ Regi ster, 3-28 Status Regis.
Inde x © Nati onal Instrum ents Corporat ion I-21 A T- MIO-16X User Manual TMRREQ Clear Register clearing analog outpu t circuitry, 5-32 descr ip t io n, 4-54 DMA op e rations , 5-41 inter r up t pro.
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